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author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2011-09-12 06:17:06 +0000 |
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committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2011-09-12 06:17:06 +0000 |
commit | cdeaf4f59b58f24ef8b09a246732988a0adb0767 (patch) | |
tree | 77594bd588036660b1f15be05ef035685f274e4a /flashrom.8 | |
parent | c25be8a188b0e0934134792ef822d16187e01dcb (diff) | |
download | flashrom-cdeaf4f59b58f24ef8b09a246732988a0adb0767.zip flashrom-cdeaf4f59b58f24ef8b09a246732988a0adb0767.tar.gz |
Add support for Xilinx parallel III (DLC5) programing cable
The rayer_spi driver defaults to the RayeR cable, but selecting other
predefined pin layouts with the type= parameter is possible:
flashrom -p rayer_spi:type=xilinx
Corresponding to flashrom svn r1437.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Diffstat (limited to 'flashrom.8')
-rw-r--r-- | flashrom.8 | 22 |
1 files changed, 18 insertions, 4 deletions
@@ -210,8 +210,8 @@ atmegaXXu2-flasher by Stefan Tauner." .sp .BR "* dediprog" " (for SPI flash ROMs attached to a Dediprog SF100)" .sp -.BR "* rayer_spi" " (for SPI flash ROMs attached to a RayeR parport \ -based programmer)" +.BR "* rayer_spi" " (for SPI flash ROMs attached to a RayeR parport " +or Xilinx DLC5 compatible cable) .sp .BR "* nicintel_spi" " (for SPI flash ROMs on Intel Gigabit network cards)" .sp @@ -512,8 +512,22 @@ syntax where is base I/O port address of the parallel port, which must be a multiple of four. Make sure to not forget the "0x" prefix for hexadecimal port addresses. .sp -More information about the hardware is available at -.BR http://rayer.ic.cz/elektro/spipgm.htm . +The default cable type is the RayeR cable. You can use the optional +.B type +parameter to specify the cable type with the +.sp +.B " flashrom \-p rayer_spi:type=model" +.sp +syntax where +.B model +can be +.BR rayer " for the RayeR cable or " xilinx " for the Xilinx Parallel Cable III +(DLC 5). +.sp +More information about the RayeR hardware is available at +.BR "http://rayer.ic.cz/elektro/spipgm.htm " . +The schematic of the Xilinx DLC 5 was published at +.BR "http://www.xilinx.com/itp/xilinx4/data/docs/pac/appendixb.html " . .TP .BR "ogp_spi " programmer The flash ROM chip to access must be specified with the |