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authorCédric Le Goater <clg@kaod.org>2016-06-08 12:23:55 +0200
committerCédric Le Goater <clg@kaod.org>2016-06-08 12:23:55 +0200
commita3689dbb407ee1b5a26d71a0c32de39ef89ff493 (patch)
treeddae77b0f4c28ffa7fbbb3de6c103016036297ab /flashchips.c
parentb056c5245741e874faa9c315166ca8b53d309efa (diff)
downloadflashrom-0.9.9-n25q256.zip
flashrom-0.9.9-n25q256.tar.gz
add support for N25Q2560.9.9-n25q256
I needed to reflash a N25Q256 on a host system and hacked flashrom to make this work. For this, I used the 4-Bytes address support developed by Boris Baykov. This is why the patch is an RFC. The whole patchset is available under github here: https://github.com/legoater/flashrom I can help in getting this patchset merged but do the comments in : http://patchwork.coreboot.org/patch/4272/ need to be all addressed or can we rework a bit the patchset to merge the main changes separately : - 4-bytes addressing - W25Q256.V support - SFDP - Progress visualization - ... Tested under Linux with spidev. Signed-off-by: Cédric Le Goater <clg@kaod.org>
Diffstat (limited to 'flashchips.c')
-rw-r--r--flashchips.c42
1 files changed, 42 insertions, 0 deletions
diff --git a/flashchips.c b/flashchips.c
index 7cd12fa..336547c 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -9743,6 +9743,48 @@ const struct flashchip flashchips[] = {
},
{
+ .vendor = "Micron/Numonyx/ST",
+ .name = "N25Q256..3E", /* ..3E = 3V, uniform 64KB/4KB blocks/sectors */
+ .bustype = BUS_SPI,
+ .manufacture_id = ST_ID,
+ .model_id = ST_N25Q256__3E,
+ .total_size = 32768,
+ .page_size = 256,
+ /* supports SFDP */
+ /* OTP: 64B total; read 0x4B, write 0x42 */
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI
+ | FEATURE_4BA_SUPPORT,
+ .four_bytes_addr_funcs =
+ {
+ .enter_4ba = spi_enter_4ba_b7_we, /* enter 4-bytes addressing mode by CMD B7 + WREN */
+ .read_nbyte = spi_nbyte_read_4ba_direct, /* read directly from any mode, no need to enter 4ba */
+ .program_byte = spi_byte_program_4ba, /* write from 4-bytes addressing mode */
+ .program_nbyte = spi_nbyte_program_4ba /* write from 4-bytes addressing mode */
+ },
+ .tested = TEST_OK_PREW,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 8192 } },
+ .block_erase = spi_block_erase_20_4ba,
+ }, {
+ .eraseblocks = { {64 * 1024, 512} },
+ .block_erase = spi_block_erase_d8_4ba,
+ }, {
+ .eraseblocks = { {32 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_n25q, /* TODO: config, lock, flag regs */
+ .unlock = spi_disable_blockprotect_n25q, /* TODO: per 64kB sector lock registers */
+ .write = spi_chip_write_256, /* Multi I/O supported */
+ .read = spi_chip_read, /* Fast read (0x0B) and multi I/O supported */
+ .voltage = {2700, 3600},
+ },
+
+ {
.vendor = "MoselVitelic",
.name = "V29C51000B",
.bustype = BUS_PARALLEL,
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