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author | Claus Gindhart <claus.gindhart@kontron.com> | 2008-05-14 12:22:38 +0000 |
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committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-05-14 12:22:38 +0000 |
commit | be269642e6601159979d48154dbff1d4af673acd (patch) | |
tree | f49014866b882302e5ba5dd3dde183e089dbff4e /chipset_enable.c | |
parent | 68cadacd6ccdd1a94c730c8ff2ecb7111d15d65d (diff) | |
download | flashrom-be269642e6601159979d48154dbff1d4af673acd.zip flashrom-be269642e6601159979d48154dbff1d4af673acd.tar.gz |
Add the Intel 6300ESB as known chipset to the chipset struct enables
Corresponding to flashrom svn r233 and coreboot v2 svn r3310.
Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to 'chipset_enable.c')
-rw-r--r-- | chipset_enable.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 77a132a..973fb81 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -577,6 +577,7 @@ static const FLASH_ENABLE enables[] = { {0x8086, 0x24c0, "Intel ICH4/ICH4-L", enable_flash_ich_4e}, {0x8086, 0x24cc, "Intel ICH4-M", enable_flash_ich_4e}, {0x8086, 0x24d0, "Intel ICH5/ICH5R", enable_flash_ich_4e}, + {0x8086, 0x25a1, "Intel 6300ESB", enable_flash_ich_4e}, {0x8086, 0x2640, "Intel ICH6/ICH6R", enable_flash_ich_dc}, {0x8086, 0x2641, "Intel ICH6-M", enable_flash_ich_dc}, {0x8086, 0x27b0, "Intel ICH7DH", enable_flash_ich_dc_spi}, |