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| author | Peter Stuge <peter@stuge.se> | 2008-12-22 14:12:08 +0000 |
|---|---|---|
| committer | Peter Stuge <peter@stuge.se> | 2008-12-22 14:12:08 +0000 |
| commit | 2ff34e63a7e77f51f80960ca31614f389e88e64c (patch) | |
| tree | ac7eb7097f24efb52eca53b2eaf846defbdd1b7d /chipset_enable.c | |
| parent | dfcc861a0a4b6b50d2088fc63bc51299dff30600 (diff) | |
| download | flashrom-2ff34e63a7e77f51f80960ca31614f389e88e64c.zip flashrom-2ff34e63a7e77f51f80960ca31614f389e88e64c.tar.gz | |
Initialize ICH SPI opcodes also for ICH9 and later
Corresponding to flashrom svn r368 and coreboot v2 svn r3830.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
Diffstat (limited to 'chipset_enable.c')
| -rw-r--r-- | chipset_enable.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index b5af401..00959ea 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -384,6 +384,7 @@ static int enable_flash_ich_dc_spi(struct pci_dev *dev, const char *name, *(uint32_t *) (spibar + 0xA0)); ICH10 only? */ printf_debug("0xB0: 0x%08x (FDOC)\n", *(uint32_t *) (spibar + 0xB0)); + ich_init_opcodes(); break; default: /* Nothing */ |
