diff options
| author | Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> | 2013-08-13 22:10:41 +0000 |
|---|---|---|
| committer | Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> | 2013-08-13 22:10:41 +0000 |
| commit | 50901fccbc650af5f4b1433e4b44833d6311f1e8 (patch) | |
| tree | 8188320a07f63b187c21f902ac238fe7a513225c /chipset_enable.c | |
| parent | 094e819b945ba7c99d8e639edcf775981d4cfaa0 (diff) | |
| download | flashrom-50901fccbc650af5f4b1433e4b44833d6311f1e8.zip flashrom-50901fccbc650af5f4b1433e4b44833d6311f1e8.tar.gz | |
Add a bunch of new/tested stuff and various small changes 19
Tested mainboards:
OK:
- ASUS P8H77-V LE
http://www.flashrom.org/pipermail/flashrom/2013-June/011127.html
- HP Pegatron IPMEL-AE (Evans-GL6)
Reported by Idwer on IRC
- MSI MS-7379 (G31M)
http://paste.flashrom.org/view.php?id=1726
- MSI MS-7816 (H87-G43)
http://www.flashrom.org/pipermail/flashrom/2013-July/011349.html
- MSI MS-9830 (IM-945GSE-A, A9830IMS)
http://paste.flashrom.org/view.php?id=1730
- Supermicro X8SAX
http://paste.flashrom.org/view.php?id=1717
NOT OK:
- Intel D2700MUD
http://paste.flashrom.org/view.php?id=1723
- Intel DQ45CB
http://www.flashrom.org/pipermail/flashrom/2013-August/011369.html
Chipsets:
- Add PCI ID for Intel's Coleto Creek.
- Mark Intel H87 (0x8c4a) as OK.
http://www.flashrom.org/pipermail/flashrom/2013-July/011349.html
Miscellaneous:
- ichspi: Fix printing address ranges if space is divided by FPB.
- Tiny other stuff.
Corresponding to flashrom svn r1709.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Diffstat (limited to 'chipset_enable.c')
| -rw-r--r-- | chipset_enable.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/chipset_enable.c b/chipset_enable.c index 2706be4..a2df263 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1440,6 +1440,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x1e5e, NT, "Intel", "HM70", enable_flash_pch7}, {0x8086, 0x1e5f, NT, "Intel", "NM70", enable_flash_pch7}, {0x8086, 0x2310, NT, "Intel", "DH89xxCC", enable_flash_pch7}, + {0x8086, 0x2390, NT, "Intel", "Coleto Creek", enable_flash_pch7}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, @@ -1511,7 +1512,7 @@ const struct penable chipset_enables[] = { {0x8086, 0x8c47, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c48, NT, "Intel", "Lynx Point", enable_flash_pch8}, {0x8086, 0x8c49, NT, "Intel", "HM86", enable_flash_pch8}, - {0x8086, 0x8c4a, NT, "Intel", "H87", enable_flash_pch8}, + {0x8086, 0x8c4a, OK, "Intel", "H87", enable_flash_pch8}, {0x8086, 0x8c4b, NT, "Intel", "HM87", enable_flash_pch8}, {0x8086, 0x8c4c, NT, "Intel", "Q85", enable_flash_pch8}, {0x8086, 0x8c4d, NT, "Intel", "Lynx Point", enable_flash_pch8}, |
