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author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2011-04-27 14:34:08 +0000 |
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committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2011-04-27 14:34:08 +0000 |
commit | bfc8ba124e9bceeb504667397b13b6f7f9125fcd (patch) | |
tree | a54fe83e5bd047ca0ae0af1469973a76acddceb8 /board_enable.c | |
parent | b5e504c5d1ea2949b76f034fc52fcc57705a948d (diff) | |
download | flashrom-bfc8ba124e9bceeb504667397b13b6f7f9125fcd.zip flashrom-bfc8ba124e9bceeb504667397b13b6f7f9125fcd.tar.gz |
Add support for more than one Super I/O or EC per machine
Flashrom currently only supports exactly one Super I/O or Embedded
Controller, and this means quite a few notebooks and a small subset of
desktop/server boards cannot be handled reliably and easily.
Allow detection and initialization of up to 3 Super I/O and/or EC chips.
WARNING! If a Super I/O or EC responds on multiple ports (0x2e and
0x4e), the code will do the wrong thing (namely, initialize the hardware
twice). I have no idea if we should handle such situations, and whether
we should ignore the second chip with identical ID or not. Initializing
the hardware twice for the IT87* family is _not_ a problem, but I don't
know how well IT85* can handle it (and whether IT85* would listen at
more than one port anyway).
Thanks to Thomas Schneider for testing on a board with ITE IT87* SPI.
Test report (success) is here: http://paste.flashrom.org/view.php?id=379
Thanks to David Hendricks for testing on a Google Cr-48 laptop with
ITE IT85* EC SPI. Test report (success) is here:
http://www.flashrom.org/pipermail/flashrom/2011-April/006275.html
Corresponding to flashrom svn r1289.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: David Hendricks <dhendrix@google.com>
Diffstat (limited to 'board_enable.c')
-rw-r--r-- | board_enable.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/board_enable.c b/board_enable.c index 919d055..3b0a4fb 100644 --- a/board_enable.c +++ b/board_enable.c @@ -493,7 +493,6 @@ int it8705f_write_enable(uint8_t port) } } else { msg_pdbg("No IT8705F flash segment enabled.\n"); - /* Not sure if this is an error or not. */ ret = 0; } exit_conf_mode_ite(port); |