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authorMichael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>2010-07-24 11:14:37 +0000
committerMichael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>2010-07-24 11:14:37 +0000
commit5ea1883071e9096cace43ecd0ccfbebb34998468 (patch)
tree13cfab42f0ad5a4d5a8520d6117de22b449d5e34 /board_enable.c
parent682e2650241aa3809722b01399ab0cee2da5c76b (diff)
downloadflashrom-5ea1883071e9096cace43ecd0ccfbebb34998468.zip
flashrom-5ea1883071e9096cace43ecd0ccfbebb34998468.tar.gz
Board enable for HP Puffer2-UL8E
lspci/superiotool: http://www.coreboot.org/pipermail/flashrom/2010-July/003869.html Corresponding to flashrom svn r1102. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Mattias Mattsson <vitplister@gmail.com>
Diffstat (limited to 'board_enable.c')
-rw-r--r--board_enable.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/board_enable.c b/board_enable.c
index 9bc303d..eb52b3a 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -1238,6 +1238,14 @@ static int intel_ich_gpio16_raise(void)
}
/**
+ * Suited for HP Puffer2-UL8E (ASUS PTGD-LA OEM): LGA775 + 915 + ICH6.
+ */
+static int intel_ich_gpio18_raise(void)
+{
+ return intel_ich_gpio_set(18, 1);
+}
+
+/**
* Suited for ASUS A8JM: Intel 945 + ICH7
*/
static int intel_ich_gpio34_raise(void)
@@ -1699,6 +1707,7 @@ const struct board_pciid_enable board_pciid_enables[] = {
{0x10DE, 0x0050, 0x1458, 0x0C11, 0x10DE, 0x005e, 0x1458, 0x5000, NULL, NULL, NULL, "GIGABYTE", "GA-K8N-SLI", 0, OK, nvidia_mcp_gpio21_raise},
{0x1166, 0x0223, 0x103c, 0x320d, 0x14e4, 0x1678, 0x103c, 0x703e, NULL, "hp", "dl145_g3", "HP", "DL145 G3", 0, OK, board_hp_dl145_g3_enable},
{0x1166, 0x0223, 0x103c, 0x320d, 0x14e4, 0x1648, 0x103c, 0x310f, NULL, "hp", "dl165_g6", "HP", "DL165 G6", 0, OK, board_hp_dl165_g6_enable},
+ {0x8086, 0x2580, 0x103c, 0x2a08, 0x8086, 0x2640, 0x103c, 0x2a0a, NULL, NULL, NULL, "HP", "Puffer2-UL8E", 0, OK, intel_ich_gpio18_raise},
{0x8086, 0x2415, 0x103c, 0x1249, 0x10b7, 0x9200, 0x103c, 0x1246, NULL, NULL, NULL, "HP", "Vectra VL400", 0, OK, board_hp_vl400},
{0x8086, 0x1a30, 0x103c, 0x1a30, 0x8086, 0x2443, 0x103c, 0x2440, "^VL420$", NULL, NULL, "HP", "VL420 SFF", 0, OK, intel_ich_gpio22_raise},
{0x10de, 0x0369, 0x103c, 0x12fe, 0x10de, 0x0364, 0x103c, 0x12fe, NULL, NULL, NULL, "HP", "xw9400", 0, OK, nvidia_mcp_gpio5_raise},
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