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authorMaksim Kuleshov <mmcx@mail.ru>2013-10-02 01:21:57 +0000
committerStefan Tauner <stefan.tauner@alumni.tuwien.ac.at>2013-10-02 01:21:57 +0000
commitecb51ca98f7c028ba94b3617a100ed38f53b27fa (patch)
tree88c3c35f7c0742eeb7ebb20a768e57ca08957183
parent07d40771cbccae13e8373493f6bad9729ee0a900 (diff)
downloadflashrom-ecb51ca98f7c028ba94b3617a100ed38f53b27fa.zip
flashrom-ecb51ca98f7c028ba94b3617a100ed38f53b27fa.tar.gz
rayer_spi: Add pinout for Altera ByteBlasterMV
There is a ByteBlasterII product that is only almost compatible. Binary file (standard input) matches Corresponding to flashrom svn r1754. Signed-off-by: Maksim Kuleshov <mmcx@mail.ru>
-rw-r--r--flashrom.8.tmpl7
-rw-r--r--rayer_spi.c26
2 files changed, 31 insertions, 2 deletions
diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl
index 487982d..38fe0f8 100644
--- a/flashrom.8.tmpl
+++ b/flashrom.8.tmpl
@@ -759,12 +759,15 @@ parameter to specify the cable type with the
syntax where
.B model
can be
-.BR rayer " for the RayeR cable or " xilinx " for the Xilinx Parallel Cable III
-(DLC 5).
+.BR rayer " for the RayeR cable, " byteblastermv " for the Altera ByteBlasterMV, or " xilinx \
+" for the Xilinx Parallel Cable III (DLC 5)."
.sp
More information about the RayeR hardware is available at
.nh
.BR "http://rayer.ic.cz/elektro/spipgm.htm " .
+The Altera ByteBlasterMV datasheet can be obtained from
+.nh
+.BR "http://www.altera.co.jp/literature/ds/dsbytemv.pdf " .
The schematic of the Xilinx DLC 5 was published in
.nh
.BR "http://www.xilinx.com/support/documentation/user_guides/xtp029.pdf " .
diff --git a/rayer_spi.c b/rayer_spi.c
index ed0f774..04edd9c 100644
--- a/rayer_spi.c
+++ b/rayer_spi.c
@@ -70,9 +70,22 @@ static const struct rayer_pinout xilinx_dlc5 = {
.miso_bit = 4,
};
+static void byteblaster_preinit(const void *);
+static int byteblaster_shutdown(void *);
+
+static const struct rayer_pinout altera_byteblastermv = {
+ .cs_bit = 1,
+ .sck_bit = 0,
+ .mosi_bit = 6,
+ .miso_bit = 7,
+ .preinit = byteblaster_preinit,
+ .shutdown = byteblaster_shutdown,
+};
+
static const struct rayer_programmer rayer_spi_types[] = {
{"rayer", NT, "RayeR SPIPGM", &rayer_spipgm},
{"xilinx", NT, "Xilinx Parallel Cable III (DLC 5)", &xilinx_dlc5},
+ {"byteblastermv", OK, "Altera ByteBlasterMV", &altera_byteblastermv},
{0},
};
@@ -195,6 +208,19 @@ int rayer_spi_init(void)
return 0;
}
+static void byteblaster_preinit(const void *data){
+ msg_pdbg("byteblaster_preinit\n");
+ /* Assert #EN signal. */
+ OUTB(2, lpt_iobase + 2 );
+}
+
+static int byteblaster_shutdown(void *data){
+ msg_pdbg("byteblaster_shutdown\n");
+ /* De-Assert #EN signal. */
+ OUTB(0, lpt_iobase + 2 );
+ return 0;
+}
+
#else
#error PCI port I/O access is not supported on this architecture yet.
#endif
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