Tidy up docs before release

Don't mention coreboot.org without context.

Corresponding to flashrom svn r688.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>

2 files changed, 5 insertions, 12 deletions

diff --git a/README b/README
index 070acff..65152e6 100644
--- a/README
+++ b/README
@@ -2,17 +2,14 @@
 flashrom README
 -------------------------------------------------------------------------------
 
-flashrom is a utility for reading, writing, verifying and erasing flash ROM
-chips. It's often used to flash BIOS/EFI/coreboot/firmware images in-system
-using a supported mainboard, but it also supports flashing of network
+flashrom is a utility for detecting, reading, writing, verifying and erasing
+flash chips. It is often used to flash BIOS/EFI/coreboot/firmware images
+in-system using a supported mainboard, but it also supports flashing of network
 cards (NICs), SATA controller cards, and other external devices which can
 program flash chips.
 
-It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and
-TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash,
-or SPI.
-
-(see http://coreboot.org for details on coreboot)
+It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and TSOP40
+chips, which use various protocols such as LPC, FWH, parallel flash, or SPI.
 
 
 Packaging
diff --git a/flashrom.8 b/flashrom.8
index 9089123..fb4ded3 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -15,10 +15,6 @@ flash chips.
 It supports a wide range of DIP32, PLCC32, DIP8, SO8/SOIC8, TSOP32, and
 TSOP40 chips, which use various protocols such as LPC, FWH, parallel flash,
 or SPI.
-.PP
-(see
-.B http://coreboot.org
-for details on coreboot)
 .SH OPTIONS
 Please note that the command line interface for flashrom will change before
 flashrom 1.0. Do not use flashrom in scripts or other automated tools without