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* Removed last bits of magic from "generate_size8_base_case".Jukka Ojanen2014-11-092-140/+122
| | | | Replace x64_call_imm with x64_call_code.
* Merge commit '8ef1d3a20ab69ef66f8506e61a08d4cfcc82d3f9'Jukka Ojanen2014-11-091-32/+34
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| * Replace amd64 with x64 in 32 bit header, which means that some macros are in ↵Jukka Ojanen2014-11-091-32/+34
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* | Replace "magic bytes" with various macrosJukka Ojanen2014-11-091-211/+59
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* | Merge commit 'f342eb3215720f9c2fe621e3445484d55c00ff3d'Jukka Ojanen2014-11-091-5/+39
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| * Added x64_sse_movaps_memindex_reg and x64_sse_movaps_reg_memindexJukka Ojanen2014-11-091-5/+39
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* | Replace SHUFPS with x64_sse_shufps_reg_reg_immJukka Ojanen2014-11-091-79/+9
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* | Replace MULPS with x64_sse_mulps_reg_regJukka Ojanen2014-11-091-31/+12
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* | Replace MOVDQA with x64_sse_movdqa_reg_membase/64_sse_movdqa_membase_regJukka Ojanen2014-11-091-98/+20
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* | Merge commit '89560561f49db1b5ed838b934256a2e38566da88'Jukka Ojanen2014-11-091-0/+9
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| * Add SSE opcode "movdqa"Jukka Ojanen2014-11-091-0/+9
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* | Replace MOVAPS with x64_sse_movaps_reg_membaseJukka Ojanen2014-11-091-76/+1
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* | Replace SUBPS with x64_sse_subps_reg_regJukka Ojanen2014-11-091-30/+12
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* | Replace ADDPS with x64_sse_addps_reg_regJukka Ojanen2014-11-091-30/+13
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* | Replace XORPS with x64_sse_xorps_reg_regJukka Ojanen2014-11-091-21/+4
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* | Merge commit '757b6eb0e7a5742ffd23b721f2fe2e041ffd1069'Jukka Ojanen2014-11-091-6/+6
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| * Again default to "__default_codegen__"Jukka Ojanen2014-11-091-6/+6
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* | Replace XOR2 with x86_clear_reg, MOV_D with ↵Jukka Ojanen2014-11-092-119/+19
| | | | | | | | x64_mov_membase_reg/x86_mov_reg_membase, MOV_R with x64_mov_reg_reg and x64_alu_reg_imm_size_body with x64_alu_reg_imm_size
* | Replace MOV_I with x86_mov_reg_imm, SHIFT with x86_shift_reg_imm, CALL with ↵Jukka Ojanen2014-11-092-120/+39
| | | | | | | | x64_call_imm, POP with x64_pop_reg, PUSH with x64_push_reg
* | Replace add/sub immediate value with x64_alu_reg_imm_size_bodyJukka Ojanen2014-11-092-54/+7
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* | Replace register names with new definitionsJukka Ojanen2014-11-082-102/+73
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* | Merge commit 'd1896e187eed7dbdd18ba34c0fe68025c678c18c'Jukka Ojanen2014-11-082-113/+114
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| * If nothing is defined, then it's "__default_codegen__"Jukka Ojanen2014-11-082-113/+114
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* | Wheel is already invented. Adding part of Mono project, ↵Jukka Ojanen2014-11-0852-0/+22754
|\ \ | |/ | | | | | | | | | | | | https://github.com/mono to src/arch. These are C macros that are useful when generating native code on various platforms. This code is MIT X11 licensed. git-subtree-dir: src/arch git-subtree-mainline: f898aaf891e175cc08d53f022acc9165e1acd2a6 git-subtree-split: 9527abbd5eb3166d290da4e3b8e16855fabdafaf
| * Replace glib.h with stdint.h for standard C99Jukka Ojanen2014-11-081-16/+16
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| * Replace amd64 with x64Jukka Ojanen2014-11-081-967/+967
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| * Rename amd64-codegen.h to x64-codegen.hJukka Ojanen2014-11-082-1/+1
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| * Rename folder amd64 to x64Jukka Ojanen2014-11-083-0/+0
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| * Added README and LICENSE text. Rebuild ChangeLog from Git logsJukka Ojanen2014-11-083-1096/+4746
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| * [runtime] Remove an unused interpreter file.Zoltan Varga2014-09-131-18/+0
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| * [cleanup] Remove more old files.Rodrigo Kumpera2014-09-098-2772/+3
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| * [runtime] Remove the interpreter.Rodrigo Kumpera2014-09-013-22/+0
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| * Architectural level set to z10 instruction setNeale Ferguson2014-06-041-13/+199
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| * Add .gitignore file in mono/arch/arm64.Alex Rønne Petersen2014-04-301-0/+6
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| * [arm64] Add JIT support.Zoltan Varga2014-04-221-0/+3
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| * [arm64] Add basic port infrastructure.Zoltan Varga2014-04-222-1/+1
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| * [jit] Implement support for atomic intrinsics on arm.Zoltan Varga2014-04-011-0/+12
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| * [arch]Add cvtsi2ss to amd64 codegen.Rodrigo Kumpera2013-12-111-0/+4
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| * Fix the encoding of x86_imul_reg_mem_imm.Alex Rønne Petersen2013-11-231-1/+1
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| * Fix the `nop` opcode on some MIPS-based Loongson CPUs.Alex Rønne Petersen2013-11-151-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | After much trouble building Mono in Debian/MIPS, @directhex narrowed it down to this issue: https://sourceware.org/ml/binutils/2009-11/msg00387.html So since some of the 2E and 2F versions of the Loongson CPUs break with a regular `sll zero, zero, 0` we need to issue an `or at, at, 0`. This makes sure we don't randomly deadlock or blow up when the CPU is under heavy load. Yes, really.
| * Merge some Nacl/ARM changes from ↵Zoltan Varga2013-05-241-0/+4
| | | | | | | | https://github.com/igotti-google/mono/commit/65d8d68e8c81cf6adb1076de7a9425c84cab86a3.
| * Enable hw division/remainder on mt in non-thumb mode as well.Zoltan Varga2013-05-141-0/+8
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| * Kill support for the ancient FPA format on ARM.Alex Rønne Petersen2013-05-146-258/+2
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| * Add lazy rgctx support to s390xNeale Ferguson2013-04-251-1/+22
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| * Remove obsolete 32 bit s390 backend.Zoltan Varga2013-04-226-1881/+1
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| * NaCl GC improvementsElijah Taylor2013-03-211-0/+8
| | | | | | | | | | | | | | - inline managed code implementation (add x86 test mem imm8 codegen macro for this as well) - clean up libgc NaCl code - centralize mono_nacl_gc into mini.c
| * Remove the unmaintained and incomplete alpha backend.Zoltan Varga2013-03-016-1125/+1
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| * Remove the unmaintained and incomplete hppa backend.Zoltan Varga2013-02-265-1529/+1
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| * Use full path for includes as this was braking the cross compiler.Rodrigo Kumpera2012-11-151-1/+1
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| * Save fp registers in the ARM throw trampoline, ios has callee saved fp ↵Zoltan Varga2012-10-041-0/+6
| | | | | | | | registers, and LLVM generates code which uses them.
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