diff options
Diffstat (limited to 'src/arch/arm/mov_macros.th')
-rw-r--r-- | src/arch/arm/mov_macros.th | 121 |
1 files changed, 121 insertions, 0 deletions
diff --git a/src/arch/arm/mov_macros.th b/src/arch/arm/mov_macros.th new file mode 100644 index 0000000..6bac290 --- /dev/null +++ b/src/arch/arm/mov_macros.th @@ -0,0 +1,121 @@ +/* Rd := imm8 ROR rot */ +#define ARM_<Op>_REG_IMM_COND(p, reg, imm8, rot, cond) \ + ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_<Op>, reg, 0, imm8, rot, cond) +#define ARM_<Op>_REG_IMM(p, reg, imm8, rot) \ + ARM_<Op>_REG_IMM_COND(p, reg, imm8, rot, ARMCOND_AL) +/* S */ +#define ARM_<Op>S_REG_IMM_COND(p, reg, imm8, rot, cond) \ + ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_<Op>, reg, 0, imm8, rot, cond) +#define ARM_<Op>S_REG_IMM(p, reg, imm8, rot) \ + ARM_<Op>S_REG_IMM_COND(p, reg, imm8, rot, ARMCOND_AL) + +#ifndef ARM_NOIASM +#define _<Op>_REG_IMM_COND(reg, imm8, rot, cond) \ + ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_<Op>, reg, 0, imm8, rot, cond) +#define _<Op>_REG_IMM(reg, imm8, rot) \ + _<Op>_REG_IMM_COND(reg, imm8, rot, ARMCOND_AL) +/* S */ +#define _<Op>S_REG_IMM_COND(reg, imm8, rot, cond) \ + ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_<Op>, reg, 0, imm8, rot, cond) +#define _<Op>S_REG_IMM(reg, imm8, rot) \ + _<Op>S_REG_IMM_COND(reg, imm8, rot, ARMCOND_AL) +#endif + + +/* Rd := imm8 */ +#define ARM_<Op>_REG_IMM8_COND(p, reg, imm8, cond) \ + ARM_DPIOP_REG_IMM8ROT_COND(p, ARMOP_<Op>, reg, 0, imm8, 0, cond) +#define ARM_<Op>_REG_IMM8(p, reg, imm8) \ + ARM_<Op>_REG_IMM8_COND(p, reg, imm8, ARMCOND_AL) +/* S */ +#define ARM_<Op>S_REG_IMM8_COND(p, reg, imm8, cond) \ + ARM_DPIOP_S_REG_IMM8ROT_COND(p, ARMOP_<Op>, reg, 0, imm8, 0, cond) +#define ARM_<Op>S_REG_IMM8(p, reg, imm8) \ + ARM_<Op>S_REG_IMM8_COND(p, reg, imm8, ARMCOND_AL) + +#ifndef ARM_NOIASM +#define _<Op>_REG_IMM8_COND(reg, imm8, cond) \ + ARM_IASM_DPIOP_REG_IMM8ROT_COND(ARMOP_<Op>, reg, 0, imm8, 0, cond) +#define _<Op>_REG_IMM8(reg, imm8) \ + _<Op>_REG_IMM8_COND(reg, imm8, ARMCOND_AL) +/* S */ +#define _<Op>S_REG_IMM8_COND(reg, imm8, cond) \ + ARM_IASM_DPIOP_S_REG_IMM8ROT_COND(ARMOP_<Op>, reg, 0, imm8, 0, cond) +#define _<Op>S_REG_IMM8(reg, imm8) \ + _<Op>S_REG_IMM8_COND(reg, imm8, ARMCOND_AL) +#endif + + +/* Rd := Rm */ +#define ARM_<Op>_REG_REG_COND(p, rd, rm, cond) \ + ARM_DPIOP_REG_REG_COND(p, ARMOP_<Op>, rd, 0, rm, cond) +#define ARM_<Op>_REG_REG(p, rd, rm) \ + ARM_<Op>_REG_REG_COND(p, rd, rm, ARMCOND_AL) +/* S */ +#define ARM_<Op>S_REG_REG_COND(p, rd, rm, cond) \ + ARM_DPIOP_S_REG_REG_COND(p, ARMOP_<Op>, rd, 0, rm, cond) +#define ARM_<Op>S_REG_REG(p, rd, rm) \ + ARM_<Op>S_REG_REG_COND(p, rd, rm, ARMCOND_AL) + +#ifndef ARM_NOIASM +#define _<Op>_REG_REG_COND(rd, rm, cond) \ + ARM_IASM_DPIOP_REG_REG_COND(ARMOP_<Op>, rd, 0, rm, cond) +#define _<Op>_REG_REG(rd, rm) \ + _<Op>_REG_REG_COND(rd, rm, ARMCOND_AL) +/* S */ +#define _<Op>S_REG_REG_COND(rd, rm, cond) \ + ARM_IASM_DPIOP_S_REG_REG_COND(ARMOP_<Op>, rd, 0, rm, cond) +#define _<Op>S_REG_REG(rd, rm) \ + _<Op>S_REG_REG_COND(rd, rm, ARMCOND_AL) +#endif + + +/* Rd := Rm <shift_type> imm_shift */ +#define ARM_<Op>_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, cond) \ + ARM_DPIOP_REG_IMMSHIFT_COND(p, ARMOP_<Op>, rd, 0, rm, shift_type, imm_shift, cond) +#define ARM_<Op>_REG_IMMSHIFT(p, rd, rm, shift_type, imm_shift) \ + ARM_<Op>_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, ARMCOND_AL) +/* S */ +#define ARM_<Op>S_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, cond) \ + ARM_DPIOP_S_REG_IMMSHIFT_COND(p, ARMOP_<Op>, rd, 0, rm, shift_type, imm_shift, cond) +#define ARM_<Op>S_REG_IMMSHIFT(p, rd, rm, shift_type, imm_shift) \ + ARM_<Op>S_REG_IMMSHIFT_COND(p, rd, rm, shift_type, imm_shift, ARMCOND_AL) + +#ifndef ARM_NOIASM +#define _<Op>_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, cond) \ + ARM_IASM_DPIOP_REG_IMMSHIFT_COND(ARMOP_<Op>, rd, 0, rm, shift_type, imm_shift, cond) +#define _<Op>_REG_IMMSHIFT(rd, rm, shift_type, imm_shift) \ + _<Op>_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, ARMCOND_AL) +/* S */ +#define _<Op>S_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, cond) \ + ARM_IASM_DPIOP_S_REG_IMMSHIFT_COND(ARMOP_<Op>, rd, 0, rm, shift_type, imm_shift, cond) +#define _<Op>S_REG_IMMSHIFT(rd, rm, shift_type, imm_shift) \ + _<Op>S_REG_IMMSHIFT_COND(rd, rm, shift_type, imm_shift, ARMCOND_AL) +#endif + + + +/* Rd := (Rm <shift_type> Rs) */ +#define ARM_<Op>_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, cond) \ + ARM_DPIOP_REG_REGSHIFT_COND(p, ARMOP_<Op>, rd, 0, rm, shift_type, rs, cond) +#define ARM_<Op>_REG_REGSHIFT(p, rd, rm, shift_type, rs) \ + ARM_<Op>_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, ARMCOND_AL) +/* S */ +#define ARM_<Op>S_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, cond) \ + ARM_DPIOP_S_REG_REGSHIFT_COND(p, ARMOP_<Op>, rd, 0, rm, shift_type, rs, cond) +#define ARM_<Op>S_REG_REGSHIFT(p, rd, rm, shift_type, rs) \ + ARM_<Op>S_REG_REGSHIFT_COND(p, rd, rm, shift_type, rs, ARMCOND_AL) + +#ifndef ARM_NOIASM +#define _<Op>_REG_REGSHIFT_COND(rd, rm, shift_type, rs, cond) \ + ARM_IASM_DPIOP_REG_REGSHIFT_COND(ARMOP_<Op>, rd, 0, rm, shift_type, rs, cond) +#define _<Op>_REG_REGSHIFT(rd, rm, shift_type, rs) \ + _<Op>_REG_REGSHIFT_COND(rd, rm, shift_type, rs, ARMCOND_AL) +/* S */ +#define _<Op>S_REG_REGSHIFT_COND(rd, rm, shift_type, rs, cond) \ + ARM_IASM_DPIOP_S_REG_REGSHIFT_COND(ARMOP_<Op>, rd, 0, rm, shift_type, rs, cond) +#define _<Op>S_REG_REGSHIFT(rd, rm, shift_type, rs) \ + _<Op>S_REG_REGSHIFT_COND(rd, rm, shift_type, rs, ARMCOND_AL) +#endif + + |