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author | Zoltan Varga <vargaz@gmail.com> | 2013-05-14 18:27:32 +0200 |
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committer | Zoltan Varga <vargaz@gmail.com> | 2013-05-14 18:27:32 +0200 |
commit | ab6a96ef346220433f9f7967b763a0453d9cbc66 (patch) | |
tree | 13a735bbdad7d72af5bd2ce0f5c553404e8acfff | |
parent | 78c1e65942210449d0d1c4957b42242ebc9bdb5a (diff) | |
download | ffts-ab6a96ef346220433f9f7967b763a0453d9cbc66.zip ffts-ab6a96ef346220433f9f7967b763a0453d9cbc66.tar.gz |
Enable hw division/remainder on mt in non-thumb mode as well.
-rw-r--r-- | arm/arm-codegen.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arm/arm-codegen.h b/arm/arm-codegen.h index 31c4575..d94653e 100644 --- a/arm/arm-codegen.h +++ b/arm/arm-codegen.h @@ -1037,6 +1037,7 @@ typedef struct { #define ARM_INC(p, reg) ARM_ADD_REG_IMM8(p, reg, reg, 1) #define ARM_DEC(p, reg) ARM_SUB_REG_IMM8(p, reg, reg, 1) +#define ARM_MLS(p, rd, rn, rm, ra) ARM_EMIT((p), (ARMCOND_AL << 28) | (0x6 << 20) | ((rd) << 16) | ((ra) << 12) | ((rm) << 8) | (0x9 << 4) | ((rn) << 0)) /* ARM V5 */ @@ -1095,6 +1096,13 @@ typedef union { #define ARM_MCR(p, coproc, opc1, rt, crn, crm, opc2) \ ARM_MCR_COND ((p), (coproc), (opc1), (rt), (crn), (crm), (opc2), ARMCOND_AL) +/* ARMv7VE */ +#define ARM_SDIV_COND(p, rd, rn, rm, cond) ARM_EMIT (p, (((cond) << 28) | (0xe << 23) | (0x1 << 20) | ((rd) << 16) | (0xf << 12) | ((rm) << 8) | (0x0 << 5) | (0x1 << 4) | ((rn) << 0))) +#define ARM_SDIV(p, rd, rn, rm) ARM_SDIV_COND ((p), (rd), (rn), (rm), ARMCOND_AL) + +#define ARM_UDIV_COND(p, rd, rn, rm, cond) ARM_EMIT (p, (((cond) << 28) | (0xe << 23) | (0x3 << 20) | ((rd) << 16) | (0xf << 12) | ((rm) << 8) | (0x0 << 5) | (0x1 << 4) | ((rn) << 0))) +#define ARM_UDIV(p, rd, rn, rm) ARM_UDIV_COND ((p), (rd), (rn), (rm), ARMCOND_AL) + #ifdef __cplusplus } #endif |