From 7a3f36a228eeb30acb9f3adde2798e9f401849d2 Mon Sep 17 00:00:00 2001 From: Vadim Bendebury Date: Wed, 18 Apr 2012 15:47:32 -0700 Subject: Sandybridge: Display platform information early It is important to have the system configuration reported as early as possible to have a better idea what exact chipset the platform is running with. This change adds code to have an early coreboot module report the CPU and PCH information. CPU info includes the 32 bit feature information word, the symbolic processor brand string, and information about some features support, as obtained through CPUID instructions. The PCH information includes the symbolic device name and PCI device version. Change-Id: If6c21ad5ffb76d7d57d89f4f87d04bdd7192480a Signed-off-by: Vadim Bendebury Reviewed-on: http://review.coreboot.org/975 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/northbridge/intel/sandybridge/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/northbridge/intel/sandybridge/Makefile.inc') diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index b72e9fa..79aa6ea 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -25,6 +25,7 @@ ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c romstage-y += udelay.c romstage-y += raminit.c romstage-y += early_init.c +romstage-y += report_platform.c romstage-y += ../../../arch/x86/lib/walkcbfs.S smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c -- cgit v1.1