From 2a9b2ed3ff5411d0efdbde3b9ba1d1de06ab09aa Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Mon, 19 May 2014 15:30:00 -0600 Subject: drivers/intel/fsp: update enable_mrc_cache with fast boot MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When going from a configuration with fast boot disabled to one with it enabled, ENABLE_MRC_CACHE was not being enabled properly. This forces it on with ENABLE_FSP_FAST_BOOT. Change-Id: If7b6374e0c0a1d5403a50a1b0a958cea6f96cc88 Signed-off-by: Martin Roth Reviewed-on: http://review.coreboot.org/5794 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Stefan Reinauer --- src/drivers/intel/fsp/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/drivers') diff --git a/src/drivers/intel/fsp/Kconfig b/src/drivers/intel/fsp/Kconfig index 3e16266..5e44046 100644 --- a/src/drivers/intel/fsp/Kconfig +++ b/src/drivers/intel/fsp/Kconfig @@ -54,6 +54,7 @@ config FSP_LOC config ENABLE_FSP_FAST_BOOT bool "Enable Fast Boot" + select ENABLE_MRC_CACHE default n help Enabling this feature will force the MRC data to be cached in NV @@ -62,7 +63,7 @@ config ENABLE_FSP_FAST_BOOT config ENABLE_MRC_CACHE bool - default ENABLE_FSP_FAST_BOOT + default n help Enabling this feature will cause MRC data to be cached in NV storage. This can either be used for fast boot, or just because the FSP wants -- cgit v1.1