From 69afe2822a960c1d2b0c84854ea6a2cd1eec29f9 Mon Sep 17 00:00:00 2001 From: Eric Biederman Date: Thu, 11 Nov 2004 06:53:24 +0000 Subject: mpspec.h: Tweak the write_smp_table macro so that it is safe if passed a complex expression. crt0.S.lb: Modified so that it is safe to include console.inc console.c: Added print_debug_ and frieds which are non inline variants of the normal console functions div64.h: Only include limits.h if ULONG_MAX is not defined and define ULONG_MAX on ppc socket_754/Config.lb Conditionally set config chip.h socket_940.c We don't need and #if CONFIG_CHIP_NAME we won't be linked in if there are no references. slot_2/chip.h: The operations struct need to be spelled cpu_intelt_slot_2_ops slot_2/slot2.c: The same spelling fix socket_mPGA603/chip.h: again socket_mPGA603/socket_mPGA603_400Mhz.c: and again socket_mPGA604_533Mhz/Config.lb: Conditionally defing CONFIG_CHIP_NAME socket_mPGA604_800Mhz/chip.h: Another spelling fix socket_mPGA604_800Mhz.c and again via/model_centaur/model_centaur_init.c: It's not an intel CPU so don't worry about Intel microcode uptdates earlymtrr.c: Remove work around for older versions of romcc pci_ids.h: More ids. malloc.c: We don't need string.h any longer uart8250.c: Be consistent when delcaring functions static inline arima/hdama/mptable.c: Cleanup to be a little more consistent amdk8/coherent_ht.c: - Talk about nodes not cpus (In preparation for dual cores) - Remove clear_temp_row (as it is no longer needed) - Demoted the failure messages to spew. - Modified to gracefully handle failure (It should work now if cpus are removed) - Handle the non-SMP case in verify_mp_capabilities - Add clear_dead_routes which replaces clear_temp_row and does more - Reorganize setup_coherent_ht_domain to cleanly handle failure. - incoherent_ht.c: Clean up the indenation a little. i8259.c: remove blank lines at the start of the file. keyboard.c: Make pc_keyboard_init static ramtest.c: Add a print out limiter, and cleanup the printout a little. amd8111/Config.lb: Mention amd8111_smbus.c amd8111_usb.c: Call the structure usb_ops not smbus_ops. NSC/pc97307/chip.h: Fix spelling issue pc97307/superio.c: Use &ops no &pnp_ops. w83627hf/suerio.c: ditto w83627thf/suerio.c: ditto buildrom.c: Use braces around the body of a for loop. It's more maintainable. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1778 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/cpu/amd/socket_754/Config.lb | 8 ++++++-- src/cpu/amd/socket_940/socket_940.c | 2 -- src/cpu/intel/model_f2x/Config.lb | 1 - src/cpu/intel/slot_2/chip.h | 2 +- src/cpu/intel/slot_2/slot_2.c | 2 +- src/cpu/intel/socket_mPGA603/chip.h | 2 +- src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c | 2 +- src/cpu/intel/socket_mPGA604_533Mhz/Config.lb | 8 +++++--- src/cpu/intel/socket_mPGA604_800Mhz/chip.h | 2 +- .../intel/socket_mPGA604_800Mhz/socket_mPGA604_800Mhz.c | 2 +- src/cpu/via/model_centaur/model_centaur_init.c | 17 ----------------- src/cpu/x86/16bit/reset16.lds | 1 - src/cpu/x86/mtrr/earlymtrr.c | 16 +++++----------- 13 files changed, 22 insertions(+), 43 deletions(-) (limited to 'src/cpu') diff --git a/src/cpu/amd/socket_754/Config.lb b/src/cpu/amd/socket_754/Config.lb index a4c6cf3..60a735a 100644 --- a/src/cpu/amd/socket_754/Config.lb +++ b/src/cpu/amd/socket_754/Config.lb @@ -1,3 +1,7 @@ -#config chip.h -#object socket_754.o +uses CONFIG_CHIP_NAME + +if CONFIG_CHIP_NAME + config chip.h +end +object socket_754.o dir /cpu/amd/model_fxx diff --git a/src/cpu/amd/socket_940/socket_940.c b/src/cpu/amd/socket_940/socket_940.c index d412538..dc825a2 100644 --- a/src/cpu/amd/socket_940/socket_940.c +++ b/src/cpu/amd/socket_940/socket_940.c @@ -1,8 +1,6 @@ #include #include "chip.h" -#if CONFIG_CHIP_NAME == 1 struct chip_operations cpu_amd_socket_940_ops = { CHIP_NAME("socket 940") }; -#endif diff --git a/src/cpu/intel/model_f2x/Config.lb b/src/cpu/intel/model_f2x/Config.lb index ef9d095..3cf5062 100644 --- a/src/cpu/intel/model_f2x/Config.lb +++ b/src/cpu/intel/model_f2x/Config.lb @@ -10,4 +10,3 @@ dir /cpu/x86/cache dir /cpu/intel/microcode dir /cpu/intel/hyperthreading driver model_f2x_init.o - diff --git a/src/cpu/intel/slot_2/chip.h b/src/cpu/intel/slot_2/chip.h index 6143302..0f504db 100644 --- a/src/cpu/intel/slot_2/chip.h +++ b/src/cpu/intel/slot_2/chip.h @@ -1,4 +1,4 @@ -extern struct chip_operations cpu_intel_slot_2_control; +extern struct chip_operations cpu_intel_slot_2_ops; struct cpu_intel_slot_2_config { }; diff --git a/src/cpu/intel/slot_2/slot_2.c b/src/cpu/intel/slot_2/slot_2.c index cc0fad3..19bbea8 100644 --- a/src/cpu/intel/slot_2/slot_2.c +++ b/src/cpu/intel/slot_2/slot_2.c @@ -2,6 +2,6 @@ #include "chip.h" -struct chip_operations cpu_intel_slot_2_control = { +struct chip_operations cpu_intel_slot_2_ops = { CHIP_NAME("slot 2") }; diff --git a/src/cpu/intel/socket_mPGA603/chip.h b/src/cpu/intel/socket_mPGA603/chip.h index eee4b9c..0170297 100644 --- a/src/cpu/intel/socket_mPGA603/chip.h +++ b/src/cpu/intel/socket_mPGA603/chip.h @@ -1,4 +1,4 @@ -extern struct chip_operations cpu_intel_socket_mPGA603_control; +extern struct chip_operations cpu_intel_socket_mPGA603_ops; struct cpu_intel_socket_mPGA603_config { }; diff --git a/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c b/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c index e589f1d..fdb90e6 100644 --- a/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c +++ b/src/cpu/intel/socket_mPGA603/socket_mPGA603_400Mhz.c @@ -2,6 +2,6 @@ #include "chip.h" -struct chip_opertations cpu_intel_socket_mPGA603_control = { +struct chip_opertations cpu_intel_socket_mPGA603_ops = { CHIP_NAME("socket mPGA603_400Mhz") }; diff --git a/src/cpu/intel/socket_mPGA604_533Mhz/Config.lb b/src/cpu/intel/socket_mPGA604_533Mhz/Config.lb index fde9b9c..1271d16 100644 --- a/src/cpu/intel/socket_mPGA604_533Mhz/Config.lb +++ b/src/cpu/intel/socket_mPGA604_533Mhz/Config.lb @@ -1,4 +1,6 @@ -#config chip.h -#object socket_mPGA604_533Mhz.o +uses CONFIG_CHIP_NAME +if CONFIG_CHIP_NAME + config chip.h +end +object socket_mPGA604_533Mhz.o dir /cpu/intel/model_f2x - diff --git a/src/cpu/intel/socket_mPGA604_800Mhz/chip.h b/src/cpu/intel/socket_mPGA604_800Mhz/chip.h index ebbbab8..b181737 100644 --- a/src/cpu/intel/socket_mPGA604_800Mhz/chip.h +++ b/src/cpu/intel/socket_mPGA604_800Mhz/chip.h @@ -1,4 +1,4 @@ -extern struct chip_operations cpu_intel_socket_mPGA604_800Mhz_control; +extern struct chip_operations cpu_intel_socket_mPGA604_800Mhz_ops; struct cpu_intel_socket_mPGA604_800Mhz_config { }; diff --git a/src/cpu/intel/socket_mPGA604_800Mhz/socket_mPGA604_800Mhz.c b/src/cpu/intel/socket_mPGA604_800Mhz/socket_mPGA604_800Mhz.c index e99e2a1..77ec2dc 100644 --- a/src/cpu/intel/socket_mPGA604_800Mhz/socket_mPGA604_800Mhz.c +++ b/src/cpu/intel/socket_mPGA604_800Mhz/socket_mPGA604_800Mhz.c @@ -2,6 +2,6 @@ #include "chip.h" -struct chip_operations cpu_intel_socket_mPGA604_800Mhz_control = { +struct chip_operations cpu_intel_socket_mPGA604_800Mhz_ops = { CHIP_NAME("socket mPGA604_800Mhz") }; diff --git a/src/cpu/via/model_centaur/model_centaur_init.c b/src/cpu/via/model_centaur/model_centaur_init.c index af2b746..52e8ee4 100644 --- a/src/cpu/via/model_centaur/model_centaur_init.c +++ b/src/cpu/via/model_centaur/model_centaur_init.c @@ -11,28 +11,11 @@ #include #include -static uint32_t microcode_updates[] = { - /* WARNING - Intel has a new data structure that has variable length - * microcode update lengths. They are encoded in int 8 and 9. A - * dummy header of nulls must terminate the list. - */ - - /* Dummy terminator */ - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, - 0x0, 0x0, 0x0, 0x0, -}; - - static void model_centaur_init(device_t dev) { /* Turn on caching if we haven't already */ x86_enable_cache(); x86_mtrr_check(); - - /* Update the microcode */ - intel_update_microcode(microcode_updates); /* Enable the local cpu apics */ setup_lapic(); diff --git a/src/cpu/x86/16bit/reset16.lds b/src/cpu/x86/16bit/reset16.lds index d01f094..4c42c76 100644 --- a/src/cpu/x86/16bit/reset16.lds +++ b/src/cpu/x86/16bit/reset16.lds @@ -13,4 +13,3 @@ SECTIONS { BYTE(0x00); } } - diff --git a/src/cpu/x86/mtrr/earlymtrr.c b/src/cpu/x86/mtrr/earlymtrr.c index bf80580..af4aa30 100644 --- a/src/cpu/x86/mtrr/earlymtrr.c +++ b/src/cpu/x86/mtrr/earlymtrr.c @@ -15,17 +15,11 @@ # error "CONFIG_LB_MEM_TOPK not defined" #endif -#if __ROMCC__ == 0 && __ROMCC_MINOR__ <= 64 - -#warning "Not checking if XIP_ROM_SIZE is valid to avoid romcc preprocessor deficiency" - -#else -# if defined(XIP_ROM_SIZE) && ((XIP_ROM_SIZE & (XIP_ROM_SIZE -1)) != 0) -# error "XIP_ROM_SIZE is not a power of 2" -# endif -# if defined(XIP_ROM_SIZE) && ((XIP_ROM_BASE % XIP_ROM_SIZE) != 0) -# error "XIP_ROM_BASE is not a multiple of XIP_ROM_SIZE" -# endif +#if defined(XIP_ROM_SIZE) && ((XIP_ROM_SIZE & (XIP_ROM_SIZE -1)) != 0) +# error "XIP_ROM_SIZE is not a power of 2" +#endif +#if defined(XIP_ROM_SIZE) && ((XIP_ROM_BASE % XIP_ROM_SIZE) != 0) +# error "XIP_ROM_BASE is not a multiple of XIP_ROM_SIZE" #endif #if (CONFIG_LB_MEM_TOPK & (CONFIG_LB_MEM_TOPK -1)) != 0 -- cgit v1.1