From 4c3ab7376ebb2e3e18919f1ab663d317dfec9b9c Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Mon, 8 Jul 2013 16:23:54 -0600 Subject: cpu: Fix spelling Change-Id: I69c46648de0689e9bed84c7726906024ad65e769 Signed-off-by: Martin Roth Reviewed-on: http://review.coreboot.org/3729 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/cpu/samsung/exynos5250/clk.h | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/cpu/samsung/exynos5250/clk.h') diff --git a/src/cpu/samsung/exynos5250/clk.h b/src/cpu/samsung/exynos5250/clk.h index ba8d960..565cf2b 100644 --- a/src/cpu/samsung/exynos5250/clk.h +++ b/src/cpu/samsung/exynos5250/clk.h @@ -72,7 +72,7 @@ unsigned long clock_get_periph_rate(enum periph_id peripheral); #define MCT_HZ 24000000 /* - * Set mshci controller instances clock drivder + * Set mshci controller instances clock divider * * @param enum periph_id instance of the mshci controller * @@ -521,7 +521,7 @@ struct exynos5_mct_regs { }; #define EXYNOS5_EPLLCON0_LOCKED_SHIFT 29 /* EPLL Locked bit position*/ -#define EPLL_SRC_CLOCK 24000000 /*24 MHz Cristal Input */ +#define EPLL_SRC_CLOCK 24000000 /*24 MHz Crystal Input */ #define TIMEOUT_EPLL_LOCK 1000 #define AUDIO_0_RATIO_MASK 0x0f -- cgit v1.1