summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorBen Gardner <gardner.ben@gmail.com>2015-12-08 21:20:25 -0600
committerMartin Roth <martinroth@google.com>2015-12-16 01:10:06 +0100
commitfa6014a6ec8253de8c86b0180221856a1398e70b (patch)
tree55d71de574980b69930abed6bf3733050e6b69ac
parent1e1c7ac3b4cb6d85eb602e04b0e4da8c042846c0 (diff)
downloadcoreboot-staging-fa6014a6ec8253de8c86b0180221856a1398e70b.zip
coreboot-staging-fa6014a6ec8253de8c86b0180221856a1398e70b.tar.gz
intel/fsp_baytrail: rename include folder baytrail to include/soc
This is to match the layout of the non-fsp baytrail to make comparisons easier and possibly remove duplicate files. Change-Id: I9a94842d724ab3826de711d398227e7bdc1045ff Signed-off-by: Ben Gardner <gardner.ben@gmail.com> Reviewed-on: https://review.coreboot.org/12686 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
-rw-r--r--src/mainboard/esd/atom15/acpi_tables.c6
-rw-r--r--src/mainboard/esd/atom15/fadt.c2
-rw-r--r--src/mainboard/esd/atom15/gpio.c2
-rw-r--r--src/mainboard/esd/atom15/irqroute.h4
-rw-r--r--src/mainboard/esd/atom15/romstage.c6
-rw-r--r--src/mainboard/intel/bayleybay_fsp/acpi_tables.c6
-rw-r--r--src/mainboard/intel/bayleybay_fsp/fadt.c2
-rw-r--r--src/mainboard/intel/bayleybay_fsp/gpio.c2
-rw-r--r--src/mainboard/intel/bayleybay_fsp/irqroute.h4
-rw-r--r--src/mainboard/intel/bayleybay_fsp/romstage.c14
-rw-r--r--src/mainboard/intel/minnowmax/acpi_tables.c6
-rw-r--r--src/mainboard/intel/minnowmax/fadt.c2
-rw-r--r--src/mainboard/intel/minnowmax/gpio.c2
-rw-r--r--src/mainboard/intel/minnowmax/irqroute.h4
-rw-r--r--src/mainboard/intel/minnowmax/romstage.c6
-rw-r--r--src/mainboard/siemens/mc_tcu3/acpi_tables.c6
-rw-r--r--src/mainboard/siemens/mc_tcu3/fadt.c2
-rw-r--r--src/mainboard/siemens/mc_tcu3/gpio.c2
-rw-r--r--src/mainboard/siemens/mc_tcu3/irqroute.h4
-rw-r--r--src/mainboard/siemens/mc_tcu3/lcd_panel.c2
-rw-r--r--src/mainboard/siemens/mc_tcu3/ptn3460.c2
-rw-r--r--src/mainboard/siemens/mc_tcu3/romstage.c14
-rw-r--r--src/soc/intel/fsp_baytrail/Makefile.inc2
-rw-r--r--src/soc/intel/fsp_baytrail/acpi.c24
-rw-r--r--src/soc/intel/fsp_baytrail/acpi/gpio.asl4
-rw-r--r--src/soc/intel/fsp_baytrail/acpi/southcluster.asl6
-rw-r--r--src/soc/intel/fsp_baytrail/bootblock/bootblock.c12
-rw-r--r--src/soc/intel/fsp_baytrail/chip.c4
-rw-r--r--src/soc/intel/fsp_baytrail/cpu.c8
-rwxr-xr-xsrc/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c14
-rw-r--r--src/soc/intel/fsp_baytrail/gpio.c6
-rw-r--r--src/soc/intel/fsp_baytrail/i2c.c8
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/acpi.h (renamed from src/soc/intel/fsp_baytrail/baytrail/acpi.h)2
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/baytrail.h (renamed from src/soc/intel/fsp_baytrail/baytrail/baytrail.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/device_nvs.h (renamed from src/soc/intel/fsp_baytrail/baytrail/device_nvs.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/ehci.h (renamed from src/soc/intel/fsp_baytrail/baytrail/ehci.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/gfx.h (renamed from src/soc/intel/fsp_baytrail/baytrail/gfx.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/gpio.h (renamed from src/soc/intel/fsp_baytrail/baytrail/gpio.h)2
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/i2c.h (renamed from src/soc/intel/fsp_baytrail/baytrail/i2c.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/iomap.h (renamed from src/soc/intel/fsp_baytrail/baytrail/iomap.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/iosf.h (renamed from src/soc/intel/fsp_baytrail/baytrail/iosf.h)2
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/irq.h (renamed from src/soc/intel/fsp_baytrail/baytrail/irq.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/lpc.h (renamed from src/soc/intel/fsp_baytrail/baytrail/lpc.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/msr.h (renamed from src/soc/intel/fsp_baytrail/baytrail/msr.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/nvm.h (renamed from src/soc/intel/fsp_baytrail/baytrail/nvm.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/nvs.h (renamed from src/soc/intel/fsp_baytrail/baytrail/nvs.h)2
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/pattrs.h (renamed from src/soc/intel/fsp_baytrail/baytrail/pattrs.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/pci_devs.h (renamed from src/soc/intel/fsp_baytrail/baytrail/pci_devs.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/pcie.h (renamed from src/soc/intel/fsp_baytrail/baytrail/pcie.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/pmc.h (renamed from src/soc/intel/fsp_baytrail/baytrail/pmc.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/ramstage.h (renamed from src/soc/intel/fsp_baytrail/baytrail/ramstage.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/reset.h (renamed from src/soc/intel/fsp_baytrail/baytrail/reset.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/romstage.h (renamed from src/soc/intel/fsp_baytrail/baytrail/romstage.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/smm.h (renamed from src/soc/intel/fsp_baytrail/baytrail/smm.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/spi.h (renamed from src/soc/intel/fsp_baytrail/baytrail/spi.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/include/soc/xhci.h (renamed from src/soc/intel/fsp_baytrail/baytrail/xhci.h)0
-rw-r--r--src/soc/intel/fsp_baytrail/iosf.c2
-rw-r--r--src/soc/intel/fsp_baytrail/memmap.c4
-rw-r--r--src/soc/intel/fsp_baytrail/northcluster.c10
-rw-r--r--src/soc/intel/fsp_baytrail/nvm.c2
-rw-r--r--src/soc/intel/fsp_baytrail/placeholders.c2
-rw-r--r--src/soc/intel/fsp_baytrail/pmutil.c8
-rw-r--r--src/soc/intel/fsp_baytrail/ramstage.c14
-rw-r--r--src/soc/intel/fsp_baytrail/reset.c4
-rw-r--r--src/soc/intel/fsp_baytrail/romstage/pmc.c12
-rw-r--r--src/soc/intel/fsp_baytrail/romstage/report_platform.c6
-rw-r--r--src/soc/intel/fsp_baytrail/romstage/romstage.c18
-rw-r--r--src/soc/intel/fsp_baytrail/romstage/uart.c10
-rw-r--r--src/soc/intel/fsp_baytrail/smihandler.c6
-rw-r--r--src/soc/intel/fsp_baytrail/smm.c6
-rw-r--r--src/soc/intel/fsp_baytrail/southcluster.c18
-rw-r--r--src/soc/intel/fsp_baytrail/spi.c4
-rw-r--r--src/soc/intel/fsp_baytrail/tsc_freq.c6
73 files changed, 164 insertions, 164 deletions
diff --git a/src/mainboard/esd/atom15/acpi_tables.c b/src/mainboard/esd/atom15/acpi_tables.c
index 48991f5..3da29ee 100644
--- a/src/mainboard/esd/atom15/acpi_tables.c
+++ b/src/mainboard/esd/atom15/acpi_tables.c
@@ -28,9 +28,9 @@
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
-#include <baytrail/acpi.h>
-#include <baytrail/nvs.h>
-#include <baytrail/iomap.h>
+#include <soc/acpi.h>
+#include <soc/nvs.h>
+#include <soc/iomap.h>
void acpi_create_gnvs(global_nvs_t *gnvs)
{
diff --git a/src/mainboard/esd/atom15/fadt.c b/src/mainboard/esd/atom15/fadt.c
index 38b9bfd..36e4655 100644
--- a/src/mainboard/esd/atom15/fadt.c
+++ b/src/mainboard/esd/atom15/fadt.c
@@ -15,7 +15,7 @@
*/
#include <arch/acpi.h>
-#include <baytrail/acpi.h>
+#include <soc/acpi.h>
void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
{
diff --git a/src/mainboard/esd/atom15/gpio.c b/src/mainboard/esd/atom15/gpio.c
index f617de4..b9c7829 100644
--- a/src/mainboard/esd/atom15/gpio.c
+++ b/src/mainboard/esd/atom15/gpio.c
@@ -15,7 +15,7 @@
*/
#include <stdlib.h>
-#include <baytrail/gpio.h>
+#include <soc/gpio.h>
#include "irqroute.h"
/*
diff --git a/src/mainboard/esd/atom15/irqroute.h b/src/mainboard/esd/atom15/irqroute.h
index f866069..6b41798 100644
--- a/src/mainboard/esd/atom15/irqroute.h
+++ b/src/mainboard/esd/atom15/irqroute.h
@@ -17,8 +17,8 @@
#ifndef IRQROUTE_H
#define IRQROUTE_H
-#include <soc/intel/fsp_baytrail/baytrail/irq.h>
-#include <soc/intel/fsp_baytrail/baytrail/pci_devs.h>
+#include <soc/intel/fsp_baytrail/include/soc/irq.h>
+#include <soc/intel/fsp_baytrail/include/soc/pci_devs.h>
/*
*IR02h GFX INT(A) - PIRQ A
diff --git a/src/mainboard/esd/atom15/romstage.c b/src/mainboard/esd/atom15/romstage.c
index 89fc9de..3aa02d8 100644
--- a/src/mainboard/esd/atom15/romstage.c
+++ b/src/mainboard/esd/atom15/romstage.c
@@ -15,12 +15,12 @@
* GNU General Public License for more details.
*/
-#include <baytrail/romstage.h>
+#include <soc/romstage.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
#include <pc80/mc146818rtc.h>
#include <console/console.h>
-#include <baytrail/gpio.h>
-#include "chip.h"
+#include <soc/gpio.h>
+#include <soc/intel/fsp_baytrail/chip.h>
/**
* /brief mainboard call for setup that needs to be done before fsp init
diff --git a/src/mainboard/intel/bayleybay_fsp/acpi_tables.c b/src/mainboard/intel/bayleybay_fsp/acpi_tables.c
index 56d287b..f8b6f65 100644
--- a/src/mainboard/intel/bayleybay_fsp/acpi_tables.c
+++ b/src/mainboard/intel/bayleybay_fsp/acpi_tables.c
@@ -27,9 +27,9 @@
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
-#include <baytrail/acpi.h>
-#include <baytrail/nvs.h>
-#include <baytrail/iomap.h>
+#include <soc/acpi.h>
+#include <soc/nvs.h>
+#include <soc/iomap.h>
void acpi_create_gnvs(global_nvs_t *gnvs)
{
diff --git a/src/mainboard/intel/bayleybay_fsp/fadt.c b/src/mainboard/intel/bayleybay_fsp/fadt.c
index 0ebfc62..8e8de51 100644
--- a/src/mainboard/intel/bayleybay_fsp/fadt.c
+++ b/src/mainboard/intel/bayleybay_fsp/fadt.c
@@ -15,7 +15,7 @@
*/
#include <arch/acpi.h>
-#include <baytrail/acpi.h>
+#include <soc/acpi.h>
void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
{
diff --git a/src/mainboard/intel/bayleybay_fsp/gpio.c b/src/mainboard/intel/bayleybay_fsp/gpio.c
index 53029f1..27b22c5 100644
--- a/src/mainboard/intel/bayleybay_fsp/gpio.c
+++ b/src/mainboard/intel/bayleybay_fsp/gpio.c
@@ -15,7 +15,7 @@
*/
#include <stdlib.h>
-#include <baytrail/gpio.h>
+#include <soc/gpio.h>
#include "irqroute.h"
/* NCORE GPIOs */
diff --git a/src/mainboard/intel/bayleybay_fsp/irqroute.h b/src/mainboard/intel/bayleybay_fsp/irqroute.h
index 8b6a46e..a24be3e 100644
--- a/src/mainboard/intel/bayleybay_fsp/irqroute.h
+++ b/src/mainboard/intel/bayleybay_fsp/irqroute.h
@@ -16,8 +16,8 @@
#ifndef IRQROUTE_H
#define IRQROUTE_H
-#include <soc/intel/fsp_baytrail/baytrail/irq.h>
-#include <soc/intel/fsp_baytrail/baytrail/pci_devs.h>
+#include <soc/intel/fsp_baytrail/include/soc/irq.h>
+#include <soc/intel/fsp_baytrail/include/soc/pci_devs.h>
/*
*IR02h GFX INT(A) - PIRQ A
diff --git a/src/mainboard/intel/bayleybay_fsp/romstage.c b/src/mainboard/intel/bayleybay_fsp/romstage.c
index 970bbd1..7af782f 100644
--- a/src/mainboard/intel/bayleybay_fsp/romstage.c
+++ b/src/mainboard/intel/bayleybay_fsp/romstage.c
@@ -25,13 +25,13 @@
#include <cpu/x86/mtrr.h>
#include <romstage_handoff.h>
#include <timestamp.h>
-#include <baytrail/gpio.h>
-#include <baytrail/iomap.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/romstage.h>
-#include <baytrail/acpi.h>
-#include <baytrail/baytrail.h>
+#include <soc/gpio.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/romstage.h>
+#include <soc/acpi.h>
+#include <soc/baytrail.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
/**
diff --git a/src/mainboard/intel/minnowmax/acpi_tables.c b/src/mainboard/intel/minnowmax/acpi_tables.c
index 48991f5..3da29ee 100644
--- a/src/mainboard/intel/minnowmax/acpi_tables.c
+++ b/src/mainboard/intel/minnowmax/acpi_tables.c
@@ -28,9 +28,9 @@
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
-#include <baytrail/acpi.h>
-#include <baytrail/nvs.h>
-#include <baytrail/iomap.h>
+#include <soc/acpi.h>
+#include <soc/nvs.h>
+#include <soc/iomap.h>
void acpi_create_gnvs(global_nvs_t *gnvs)
{
diff --git a/src/mainboard/intel/minnowmax/fadt.c b/src/mainboard/intel/minnowmax/fadt.c
index 38b9bfd..36e4655 100644
--- a/src/mainboard/intel/minnowmax/fadt.c
+++ b/src/mainboard/intel/minnowmax/fadt.c
@@ -15,7 +15,7 @@
*/
#include <arch/acpi.h>
-#include <baytrail/acpi.h>
+#include <soc/acpi.h>
void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
{
diff --git a/src/mainboard/intel/minnowmax/gpio.c b/src/mainboard/intel/minnowmax/gpio.c
index 008dbee..228b55b 100644
--- a/src/mainboard/intel/minnowmax/gpio.c
+++ b/src/mainboard/intel/minnowmax/gpio.c
@@ -15,7 +15,7 @@
*/
#include <stdlib.h>
-#include <baytrail/gpio.h>
+#include <soc/gpio.h>
#include "irqroute.h"
/*
diff --git a/src/mainboard/intel/minnowmax/irqroute.h b/src/mainboard/intel/minnowmax/irqroute.h
index 0b577bc..0b194aa 100644
--- a/src/mainboard/intel/minnowmax/irqroute.h
+++ b/src/mainboard/intel/minnowmax/irqroute.h
@@ -17,8 +17,8 @@
#ifndef IRQROUTE_H
#define IRQROUTE_H
-#include <soc/intel/fsp_baytrail/baytrail/irq.h>
-#include <soc/intel/fsp_baytrail/baytrail/pci_devs.h>
+#include <soc/intel/fsp_baytrail/include/soc/irq.h>
+#include <soc/intel/fsp_baytrail/include/soc/pci_devs.h>
/*
*IR02h GFX INT(A) - PIRQ A
diff --git a/src/mainboard/intel/minnowmax/romstage.c b/src/mainboard/intel/minnowmax/romstage.c
index dd441f8..7ee4f21 100644
--- a/src/mainboard/intel/minnowmax/romstage.c
+++ b/src/mainboard/intel/minnowmax/romstage.c
@@ -15,12 +15,12 @@
* GNU General Public License for more details.
*/
-#include <baytrail/romstage.h>
+#include <soc/romstage.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
#include <pc80/mc146818rtc.h>
#include <console/console.h>
-#include <baytrail/gpio.h>
-#include "chip.h"
+#include <soc/gpio.h>
+#include <soc/intel/fsp_baytrail/chip.h>
/**
* /brief mainboard call for setup that needs to be done before fsp init
diff --git a/src/mainboard/siemens/mc_tcu3/acpi_tables.c b/src/mainboard/siemens/mc_tcu3/acpi_tables.c
index 56d287b..f8b6f65 100644
--- a/src/mainboard/siemens/mc_tcu3/acpi_tables.c
+++ b/src/mainboard/siemens/mc_tcu3/acpi_tables.c
@@ -27,9 +27,9 @@
#include <device/pci_ids.h>
#include <cpu/cpu.h>
#include <cpu/x86/msr.h>
-#include <baytrail/acpi.h>
-#include <baytrail/nvs.h>
-#include <baytrail/iomap.h>
+#include <soc/acpi.h>
+#include <soc/nvs.h>
+#include <soc/iomap.h>
void acpi_create_gnvs(global_nvs_t *gnvs)
{
diff --git a/src/mainboard/siemens/mc_tcu3/fadt.c b/src/mainboard/siemens/mc_tcu3/fadt.c
index 0ebfc62..8e8de51 100644
--- a/src/mainboard/siemens/mc_tcu3/fadt.c
+++ b/src/mainboard/siemens/mc_tcu3/fadt.c
@@ -15,7 +15,7 @@
*/
#include <arch/acpi.h>
-#include <baytrail/acpi.h>
+#include <soc/acpi.h>
void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt)
{
diff --git a/src/mainboard/siemens/mc_tcu3/gpio.c b/src/mainboard/siemens/mc_tcu3/gpio.c
index a7e5b05..fc5178f 100644
--- a/src/mainboard/siemens/mc_tcu3/gpio.c
+++ b/src/mainboard/siemens/mc_tcu3/gpio.c
@@ -15,7 +15,7 @@
*/
#include <stdlib.h>
-#include <baytrail/gpio.h>
+#include <soc/gpio.h>
#include "irqroute.h"
/* NCORE GPIOs */
diff --git a/src/mainboard/siemens/mc_tcu3/irqroute.h b/src/mainboard/siemens/mc_tcu3/irqroute.h
index 8b6a46e..a24be3e 100644
--- a/src/mainboard/siemens/mc_tcu3/irqroute.h
+++ b/src/mainboard/siemens/mc_tcu3/irqroute.h
@@ -16,8 +16,8 @@
#ifndef IRQROUTE_H
#define IRQROUTE_H
-#include <soc/intel/fsp_baytrail/baytrail/irq.h>
-#include <soc/intel/fsp_baytrail/baytrail/pci_devs.h>
+#include <soc/intel/fsp_baytrail/include/soc/irq.h>
+#include <soc/intel/fsp_baytrail/include/soc/pci_devs.h>
/*
*IR02h GFX INT(A) - PIRQ A
diff --git a/src/mainboard/siemens/mc_tcu3/lcd_panel.c b/src/mainboard/siemens/mc_tcu3/lcd_panel.c
index 0ee9317..91159f9 100644
--- a/src/mainboard/siemens/mc_tcu3/lcd_panel.c
+++ b/src/mainboard/siemens/mc_tcu3/lcd_panel.c
@@ -16,7 +16,7 @@
#include <console/console.h>
#include <string.h>
#include "modhwinfo.h"
-#include "baytrail/gpio.h"
+#include "soc/gpio.h"
#include "lcd_panel.h"
#include "ptn3460.h"
diff --git a/src/mainboard/siemens/mc_tcu3/ptn3460.c b/src/mainboard/siemens/mc_tcu3/ptn3460.c
index cdcae68..e371e53 100644
--- a/src/mainboard/siemens/mc_tcu3/ptn3460.c
+++ b/src/mainboard/siemens/mc_tcu3/ptn3460.c
@@ -14,7 +14,7 @@
*/
#include <console/console.h>
-#include "baytrail/i2c.h"
+#include "soc/i2c.h"
#include "ptn3460.h"
/** \brief This functions sets up the DP2LVDS-converter to be used with the
diff --git a/src/mainboard/siemens/mc_tcu3/romstage.c b/src/mainboard/siemens/mc_tcu3/romstage.c
index f19ec83..49483e5 100644
--- a/src/mainboard/siemens/mc_tcu3/romstage.c
+++ b/src/mainboard/siemens/mc_tcu3/romstage.c
@@ -25,13 +25,13 @@
#include <cpu/x86/mtrr.h>
#include <romstage_handoff.h>
#include <timestamp.h>
-#include <baytrail/gpio.h>
-#include <baytrail/iomap.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/romstage.h>
-#include <baytrail/acpi.h>
-#include <baytrail/baytrail.h>
+#include <soc/gpio.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/romstage.h>
+#include <soc/acpi.h>
+#include <soc/baytrail.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
#include "modhwinfo.h"
diff --git a/src/soc/intel/fsp_baytrail/Makefile.inc b/src/soc/intel/fsp_baytrail/Makefile.inc
index 54ad88a..79fc7eb 100644
--- a/src/soc/intel/fsp_baytrail/Makefile.inc
+++ b/src/soc/intel/fsp_baytrail/Makefile.inc
@@ -55,7 +55,7 @@ ramstage-$(CONFIG_HAVE_SMI_HANDLER) += smm.c
ramstage-y += placeholders.c
ramstage-y += i2c.c
-CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/
+CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/include
CPPFLAGS_common += -I$(src)/soc/intel/fsp_baytrail/fsp
endif
diff --git a/src/soc/intel/fsp_baytrail/acpi.c b/src/soc/intel/fsp_baytrail/acpi.c
index 2aa8c00..e55709c 100644
--- a/src/soc/intel/fsp_baytrail/acpi.c
+++ b/src/soc/intel/fsp_baytrail/acpi.c
@@ -28,21 +28,21 @@
#include <arch/smp/mpspec.h>
#include <device/device.h>
#include <device/pci.h>
-#include <baytrail/baytrail.h>
+#include <soc/baytrail.h>
#include <device/pci_ids.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/acpi.h>
+#include <soc/pci_devs.h>
+#include <soc/acpi.h>
#include <string.h>
-#include <baytrail/iomap.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
-#include <baytrail/irq.h>
-#include <baytrail/iosf.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
+#include <soc/irq.h>
+#include <soc/iosf.h>
#include <arch/io.h>
-#include <baytrail/msr.h>
-#include <baytrail/pattrs.h>
-#include <baytrail/pmc.h>
+#include <soc/msr.h>
+#include <soc/pattrs.h>
+#include <soc/pmc.h>
#include <cpu/cpu.h>
#include <cbmem.h>
diff --git a/src/soc/intel/fsp_baytrail/acpi/gpio.asl b/src/soc/intel/fsp_baytrail/acpi/gpio.asl
index 1d96cec..d0e9be5 100644
--- a/src/soc/intel/fsp_baytrail/acpi/gpio.asl
+++ b/src/soc/intel/fsp_baytrail/acpi/gpio.asl
@@ -14,8 +14,8 @@
* GNU General Public License for more details.
*/
-#include <soc/intel/fsp_baytrail/baytrail/iomap.h>
-#include <soc/intel/fsp_baytrail/baytrail/irq.h>
+#include <soc/intel/fsp_baytrail/include/soc/iomap.h>
+#include <soc/intel/fsp_baytrail/include/soc/irq.h>
/* SouthCluster GPIO */
Device (GPSC)
diff --git a/src/soc/intel/fsp_baytrail/acpi/southcluster.asl b/src/soc/intel/fsp_baytrail/acpi/southcluster.asl
index c775263..2fbdb16 100644
--- a/src/soc/intel/fsp_baytrail/acpi/southcluster.asl
+++ b/src/soc/intel/fsp_baytrail/acpi/southcluster.asl
@@ -14,9 +14,9 @@
* GNU General Public License for more details.
*/
-#include <soc/intel/fsp_baytrail/baytrail/iomap.h>
-#include <soc/intel/fsp_baytrail/baytrail/irq.h>
-#include "../baytrail/baytrail.h"
+#include <soc/intel/fsp_baytrail/include/soc/iomap.h>
+#include <soc/intel/fsp_baytrail/include/soc/irq.h>
+#include "../include/soc/baytrail.h"
Scope(\)
{
diff --git a/src/soc/intel/fsp_baytrail/bootblock/bootblock.c b/src/soc/intel/fsp_baytrail/bootblock/bootblock.c
index bba5cf4..2b1eb10 100644
--- a/src/soc/intel/fsp_baytrail/bootblock/bootblock.c
+++ b/src/soc/intel/fsp_baytrail/bootblock/bootblock.c
@@ -19,12 +19,12 @@
#include <cpu/x86/msr.h>
#include <cpu/x86/mtrr.h>
#include <cpu/intel/microcode/microcode.c>
-#include <baytrail/iosf.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/spi.h>
-#include <baytrail/iomap.h>
-#include <baytrail/lpc.h>
-#include <baytrail/gpio.h>
+#include <soc/iosf.h>
+#include <soc/pci_devs.h>
+#include <soc/spi.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/gpio.h>
#include <reset.h>
/*
diff --git a/src/soc/intel/fsp_baytrail/chip.c b/src/soc/intel/fsp_baytrail/chip.c
index bd3b747..6bdb7b4 100644
--- a/src/soc/intel/fsp_baytrail/chip.c
+++ b/src/soc/intel/fsp_baytrail/chip.c
@@ -16,8 +16,8 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/ramstage.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
#include "chip.h"
diff --git a/src/soc/intel/fsp_baytrail/cpu.c b/src/soc/intel/fsp_baytrail/cpu.c
index 5f9fc4b..3451383 100644
--- a/src/soc/intel/fsp_baytrail/cpu.c
+++ b/src/soc/intel/fsp_baytrail/cpu.c
@@ -27,11 +27,11 @@
#include <cpu/x86/smm.h>
#include <reg_script.h>
-#include <baytrail/msr.h>
-#include <baytrail/pattrs.h>
-#include <baytrail/ramstage.h>
+#include <soc/msr.h>
+#include <soc/pattrs.h>
+#include <soc/ramstage.h>
#if IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)
-#include <baytrail/smm.h>
+#include <soc/smm.h>
static void smm_relocate(void *unused);
static void enable_smis(void *unused);
diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
index 462d007..1327533 100755
--- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
+++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
@@ -21,18 +21,18 @@
#include <cbmem.h>
#include <device/device.h>
#include <device/pci_def.h>
-#include <baytrail/pci_devs.h>
+#include <soc/pci_devs.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
#include "../chip.h"
#include <arch/io.h>
-#include <baytrail/reset.h>
-#include <baytrail/pmc.h>
-#include <baytrail/acpi.h>
-#include <baytrail/iomap.h>
-#include <baytrail/smm.h>
+#include <soc/reset.h>
+#include <soc/pmc.h>
+#include <soc/acpi.h>
+#include <soc/iomap.h>
+#include <soc/smm.h>
#ifdef __PRE_RAM__
-#include <baytrail/romstage.h>
+#include <soc/romstage.h>
#endif
#ifdef __PRE_RAM__
diff --git a/src/soc/intel/fsp_baytrail/gpio.c b/src/soc/intel/fsp_baytrail/gpio.c
index 3497a63..862e42b 100644
--- a/src/soc/intel/fsp_baytrail/gpio.c
+++ b/src/soc/intel/fsp_baytrail/gpio.c
@@ -15,9 +15,9 @@
#include <device/pci.h>
#include <console/console.h>
-#include <baytrail/gpio.h>
-#include <baytrail/pmc.h>
-#include <baytrail/smm.h>
+#include <soc/gpio.h>
+#include <soc/pmc.h>
+#include <soc/smm.h>
/*
* GPIO-to-Pad LUTs
diff --git a/src/soc/intel/fsp_baytrail/i2c.c b/src/soc/intel/fsp_baytrail/i2c.c
index 0d96faf..6cf07a4 100644
--- a/src/soc/intel/fsp_baytrail/i2c.c
+++ b/src/soc/intel/fsp_baytrail/i2c.c
@@ -14,11 +14,11 @@
*/
#include <device/pci.h>
-#include <baytrail/baytrail.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/iosf.h>
+#include <soc/baytrail.h>
+#include <soc/pci_devs.h>
+#include <soc/iosf.h>
#include <delay.h>
-#include <baytrail/i2c.h>
+#include <soc/i2c.h>
/* Wait for the transmit FIFO till there is at least one slot empty.
* FIFO stall due to transmit abort will be checked and resolved
diff --git a/src/soc/intel/fsp_baytrail/baytrail/acpi.h b/src/soc/intel/fsp_baytrail/include/soc/acpi.h
index f9b2900..7dfec72 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/acpi.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/acpi.h
@@ -18,7 +18,7 @@
#define _BAYTRAIL_ACPI_H_
#include <arch/acpi.h>
-#include <baytrail/nvs.h>
+#include <soc/nvs.h>
#include <device/device.h>
void acpi_create_intel_hpet(acpi_hpet_t * hpet);
diff --git a/src/soc/intel/fsp_baytrail/baytrail/baytrail.h b/src/soc/intel/fsp_baytrail/include/soc/baytrail.h
index bc75567..bc75567 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/baytrail.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/baytrail.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/device_nvs.h b/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h
index 5c4e49b..5c4e49b 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/device_nvs.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/device_nvs.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/ehci.h b/src/soc/intel/fsp_baytrail/include/soc/ehci.h
index fe990b7..fe990b7 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/ehci.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/ehci.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/gfx.h b/src/soc/intel/fsp_baytrail/include/soc/gfx.h
index e7fc8ca..e7fc8ca 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/gfx.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/gfx.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/gpio.h b/src/soc/intel/fsp_baytrail/include/soc/gpio.h
index 736f3ce..e1164a3 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/gpio.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/gpio.h
@@ -18,7 +18,7 @@
#include <stdint.h>
#include <arch/io.h>
-#include <baytrail/iomap.h>
+#include <soc/iomap.h>
/* #define GPIO_DEBUG */
diff --git a/src/soc/intel/fsp_baytrail/baytrail/i2c.h b/src/soc/intel/fsp_baytrail/include/soc/i2c.h
index 4efb9bd..4efb9bd 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/i2c.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/i2c.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/iomap.h b/src/soc/intel/fsp_baytrail/include/soc/iomap.h
index bb6b4bb..bb6b4bb 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/iomap.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/iomap.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/iosf.h b/src/soc/intel/fsp_baytrail/include/soc/iosf.h
index 20f5566..1c38884 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/iosf.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/iosf.h
@@ -17,7 +17,7 @@
#define _BAYTRAIL_IOSF_H_
#include <stdint.h>
-#include <baytrail/pci_devs.h>
+#include <soc/pci_devs.h>
/*
* The Bay Trail SoC has a message network called IOSF Sideband. The access
diff --git a/src/soc/intel/fsp_baytrail/baytrail/irq.h b/src/soc/intel/fsp_baytrail/include/soc/irq.h
index de8fc03..de8fc03 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/irq.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/irq.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/lpc.h b/src/soc/intel/fsp_baytrail/include/soc/lpc.h
index 832fb31..832fb31 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/lpc.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/lpc.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/msr.h b/src/soc/intel/fsp_baytrail/include/soc/msr.h
index ea1d790..ea1d790 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/msr.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/msr.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/nvm.h b/src/soc/intel/fsp_baytrail/include/soc/nvm.h
index d03506e..d03506e 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/nvm.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/nvm.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/nvs.h b/src/soc/intel/fsp_baytrail/include/soc/nvs.h
index cbfdd13..17c60dd 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/nvs.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/nvs.h
@@ -17,7 +17,7 @@
#ifndef _BAYTRAIL_NVS_H_
#define _BAYTRAIL_NVS_H_
-#include <baytrail/device_nvs.h>
+#include <soc/device_nvs.h>
typedef struct {
/* Miscellaneous */
diff --git a/src/soc/intel/fsp_baytrail/baytrail/pattrs.h b/src/soc/intel/fsp_baytrail/include/soc/pattrs.h
index 7d10cea..7d10cea 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/pattrs.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/pattrs.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/pci_devs.h b/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h
index 2d0dac1..2d0dac1 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/pci_devs.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/pci_devs.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/pcie.h b/src/soc/intel/fsp_baytrail/include/soc/pcie.h
index 9d2d3de..9d2d3de 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/pcie.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/pcie.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/pmc.h b/src/soc/intel/fsp_baytrail/include/soc/pmc.h
index 1652e86..1652e86 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/pmc.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/pmc.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/ramstage.h b/src/soc/intel/fsp_baytrail/include/soc/ramstage.h
index 5c2f98a..5c2f98a 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/ramstage.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/ramstage.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/reset.h b/src/soc/intel/fsp_baytrail/include/soc/reset.h
index 4a36207..4a36207 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/reset.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/reset.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/romstage.h b/src/soc/intel/fsp_baytrail/include/soc/romstage.h
index a3fdb7b..a3fdb7b 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/romstage.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/romstage.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/smm.h b/src/soc/intel/fsp_baytrail/include/soc/smm.h
index c929572..c929572 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/smm.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/smm.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/spi.h b/src/soc/intel/fsp_baytrail/include/soc/spi.h
index 1ac0b59..1ac0b59 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/spi.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/spi.h
diff --git a/src/soc/intel/fsp_baytrail/baytrail/xhci.h b/src/soc/intel/fsp_baytrail/include/soc/xhci.h
index ec643c1..ec643c1 100644
--- a/src/soc/intel/fsp_baytrail/baytrail/xhci.h
+++ b/src/soc/intel/fsp_baytrail/include/soc/xhci.h
diff --git a/src/soc/intel/fsp_baytrail/iosf.c b/src/soc/intel/fsp_baytrail/iosf.c
index 334e2dc..e6b6039 100644
--- a/src/soc/intel/fsp_baytrail/iosf.c
+++ b/src/soc/intel/fsp_baytrail/iosf.c
@@ -15,7 +15,7 @@
*/
#include <arch/io.h>
-#include <baytrail/iosf.h>
+#include <soc/iosf.h>
#if !defined(__PRE_RAM__)
#define IOSF_PCI_BASE (CONFIG_MMCONF_BASE_ADDRESS + (IOSF_PCI_DEV << 12))
diff --git a/src/soc/intel/fsp_baytrail/memmap.c b/src/soc/intel/fsp_baytrail/memmap.c
index 0c2c14d..1886c6f 100644
--- a/src/soc/intel/fsp_baytrail/memmap.c
+++ b/src/soc/intel/fsp_baytrail/memmap.c
@@ -16,8 +16,8 @@
#include <arch/io.h>
#include <cbmem.h>
-#include <baytrail/iosf.h>
-#include <baytrail/smm.h>
+#include <soc/iosf.h>
+#include <soc/smm.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
uintptr_t smm_region_start(void)
diff --git a/src/soc/intel/fsp_baytrail/northcluster.c b/src/soc/intel/fsp_baytrail/northcluster.c
index 3b27c39..5b68666 100644
--- a/src/soc/intel/fsp_baytrail/northcluster.c
+++ b/src/soc/intel/fsp_baytrail/northcluster.c
@@ -20,13 +20,13 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <cpu/x86/lapic.h>
-#include <baytrail/iomap.h>
-#include <baytrail/iosf.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/ramstage.h>
+#include <soc/iomap.h>
+#include <soc/iosf.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
#include <device/pci.h>
#include <cbmem.h>
-#include <baytrail/baytrail.h>
+#include <soc/baytrail.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
#include <arch/acpi.h>
diff --git a/src/soc/intel/fsp_baytrail/nvm.c b/src/soc/intel/fsp_baytrail/nvm.c
index 896e9b0..ed0d121 100644
--- a/src/soc/intel/fsp_baytrail/nvm.c
+++ b/src/soc/intel/fsp_baytrail/nvm.c
@@ -20,7 +20,7 @@
#include <string.h>
#include <spi-generic.h>
#include <spi_flash.h>
-#include <baytrail/nvm.h>
+#include <soc/nvm.h>
/* This module assumes the flash is memory mapped just below 4GiB in the
* address space for reading. Also this module assumes an area it erased
diff --git a/src/soc/intel/fsp_baytrail/placeholders.c b/src/soc/intel/fsp_baytrail/placeholders.c
index c9a9da4..9a08e6f 100644
--- a/src/soc/intel/fsp_baytrail/placeholders.c
+++ b/src/soc/intel/fsp_baytrail/placeholders.c
@@ -2,7 +2,7 @@
#include <arch/acpi.h>
#include <cpu/cpu.h>
#include <device/pci_rom.h>
-#include <baytrail/acpi.h>
+#include <soc/acpi.h>
void acpi_create_serialio_ssdt(acpi_header_t *ssdt) {}
diff --git a/src/soc/intel/fsp_baytrail/pmutil.c b/src/soc/intel/fsp_baytrail/pmutil.c
index 1757dcc..3759174 100644
--- a/src/soc/intel/fsp_baytrail/pmutil.c
+++ b/src/soc/intel/fsp_baytrail/pmutil.c
@@ -17,10 +17,10 @@
#include <arch/io.h>
#include <console/console.h>
-#include <baytrail/iomap.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
#if defined(__SMM__)
diff --git a/src/soc/intel/fsp_baytrail/ramstage.c b/src/soc/intel/fsp_baytrail/ramstage.c
index abd4451..a322ee3 100644
--- a/src/soc/intel/fsp_baytrail/ramstage.c
+++ b/src/soc/intel/fsp_baytrail/ramstage.c
@@ -26,13 +26,13 @@
#include <stdlib.h>
#include <string.h>
-#include <baytrail/gpio.h>
-#include <baytrail/lpc.h>
-#include <baytrail/nvs.h>
-#include <baytrail/msr.h>
-#include <baytrail/pattrs.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/ramstage.h>
+#include <soc/gpio.h>
+#include <soc/lpc.h>
+#include <soc/nvs.h>
+#include <soc/msr.h>
+#include <soc/pattrs.h>
+#include <soc/pci_devs.h>
+#include <soc/ramstage.h>
/* Global PATTRS */
DEFINE_PATTRS;
diff --git a/src/soc/intel/fsp_baytrail/reset.c b/src/soc/intel/fsp_baytrail/reset.c
index fc1bddf..fd38f61 100644
--- a/src/soc/intel/fsp_baytrail/reset.c
+++ b/src/soc/intel/fsp_baytrail/reset.c
@@ -14,8 +14,8 @@
*/
#include <arch/io.h>
-#include <baytrail/pmc.h>
-#include <baytrail/reset.h>
+#include <soc/pmc.h>
+#include <soc/reset.h>
void cold_reset(void)
{
diff --git a/src/soc/intel/fsp_baytrail/romstage/pmc.c b/src/soc/intel/fsp_baytrail/romstage/pmc.c
index e2f4452..8df2341 100644
--- a/src/soc/intel/fsp_baytrail/romstage/pmc.c
+++ b/src/soc/intel/fsp_baytrail/romstage/pmc.c
@@ -18,12 +18,12 @@
#include <console/console.h>
#include <device/device.h>
#include <device/pci_def.h>
-#include <baytrail/iomap.h>
-#include <baytrail/iosf.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
-#include <baytrail/romstage.h>
+#include <soc/iomap.h>
+#include <soc/iosf.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
+#include <soc/romstage.h>
#include "../chip.h"
void tco_disable(void)
diff --git a/src/soc/intel/fsp_baytrail/romstage/report_platform.c b/src/soc/intel/fsp_baytrail/romstage/report_platform.c
index 2344019..1e32262 100644
--- a/src/soc/intel/fsp_baytrail/romstage/report_platform.c
+++ b/src/soc/intel/fsp_baytrail/romstage/report_platform.c
@@ -16,10 +16,10 @@
#include <console/console.h>
#include <arch/io.h>
-#include <baytrail/iosf.h>
-#include <baytrail/romstage.h>
+#include <soc/iosf.h>
+#include <soc/romstage.h>
#include <cpu/x86/msr.h>
-#include <baytrail/msr.h>
+#include <soc/msr.h>
#include <cpu/x86/name.h>
static void print_dram_info(void)
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c
index 6773a5b..b485be1 100644
--- a/src/soc/intel/fsp_baytrail/romstage/romstage.c
+++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c
@@ -26,16 +26,16 @@
#include <cpu/x86/mtrr.h>
#include <romstage_handoff.h>
#include <timestamp.h>
-#include <baytrail/gpio.h>
-#include <baytrail/iomap.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/romstage.h>
-#include <baytrail/acpi.h>
-#include <baytrail/baytrail.h>
+#include <soc/gpio.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/romstage.h>
+#include <soc/acpi.h>
+#include <soc/baytrail.h>
#include <drivers/intel/fsp1_0/fsp_util.h>
-#include <baytrail/pmc.h>
-#include <baytrail/spi.h>
+#include <soc/pmc.h>
+#include <soc/spi.h>
#include <version.h>
#include <pc80/mc146818rtc.h>
#include <device/pci_def.h>
diff --git a/src/soc/intel/fsp_baytrail/romstage/uart.c b/src/soc/intel/fsp_baytrail/romstage/uart.c
index 50a194b..10a00f8 100644
--- a/src/soc/intel/fsp_baytrail/romstage/uart.c
+++ b/src/soc/intel/fsp_baytrail/romstage/uart.c
@@ -14,11 +14,11 @@
*/
#include <arch/io.h>
-#include <baytrail/gpio.h>
-#include <baytrail/iomap.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/romstage.h>
+#include <soc/gpio.h>
+#include <soc/iomap.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
+#include <soc/romstage.h>
void byt_config_com1_and_enable(void)
{
diff --git a/src/soc/intel/fsp_baytrail/smihandler.c b/src/soc/intel/fsp_baytrail/smihandler.c
index 4d8bcc0..e0a55f8 100644
--- a/src/soc/intel/fsp_baytrail/smihandler.c
+++ b/src/soc/intel/fsp_baytrail/smihandler.c
@@ -23,9 +23,9 @@
#include <elog.h>
#include <halt.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
-#include <baytrail/nvs.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
+#include <soc/nvs.h>
/* GNVS needs to be set by coreboot initiating a software SMI. */
static global_nvs_t *gnvs;
diff --git a/src/soc/intel/fsp_baytrail/smm.c b/src/soc/intel/fsp_baytrail/smm.c
index 236106c..eb24d21 100644
--- a/src/soc/intel/fsp_baytrail/smm.c
+++ b/src/soc/intel/fsp_baytrail/smm.c
@@ -22,9 +22,9 @@
#include <cpu/x86/smm.h>
#include <string.h>
-#include <baytrail/iomap.h>
-#include <baytrail/pmc.h>
-#include <baytrail/smm.h>
+#include <soc/iomap.h>
+#include <soc/pmc.h>
+#include <soc/smm.h>
/* Save the gpio route register. The settings are committed from
* southcluster_smm_enable_smi(). */
diff --git a/src/soc/intel/fsp_baytrail/southcluster.c b/src/soc/intel/fsp_baytrail/southcluster.c
index 6182948..3ad692f 100644
--- a/src/soc/intel/fsp_baytrail/southcluster.c
+++ b/src/soc/intel/fsp_baytrail/southcluster.c
@@ -30,15 +30,15 @@
#include <pc80/i8259.h>
#include <pc80/isa-dma.h>
-#include <baytrail/baytrail.h>
-#include <baytrail/iomap.h>
-#include <baytrail/irq.h>
-#include <baytrail/lpc.h>
-#include <baytrail/nvs.h>
-#include <baytrail/acpi.h>
-#include <baytrail/pci_devs.h>
-#include <baytrail/pmc.h>
-#include <baytrail/ramstage.h>
+#include <soc/baytrail.h>
+#include <soc/iomap.h>
+#include <soc/irq.h>
+#include <soc/lpc.h>
+#include <soc/nvs.h>
+#include <soc/acpi.h>
+#include <soc/pci_devs.h>
+#include <soc/pmc.h>
+#include <soc/ramstage.h>
#include "chip.h"
#include <arch/acpi.h>
#include <arch/acpigen.h>
diff --git a/src/soc/intel/fsp_baytrail/spi.c b/src/soc/intel/fsp_baytrail/spi.c
index adbc0e2..1b85fc5 100644
--- a/src/soc/intel/fsp_baytrail/spi.c
+++ b/src/soc/intel/fsp_baytrail/spi.c
@@ -23,8 +23,8 @@
#include <device/pci_ids.h>
#include <spi_flash.h>
-#include <baytrail/lpc.h>
-#include <baytrail/pci_devs.h>
+#include <soc/lpc.h>
+#include <soc/pci_devs.h>
#ifdef __SMM__
#define pci_read_config_byte(dev, reg, targ)\
diff --git a/src/soc/intel/fsp_baytrail/tsc_freq.c b/src/soc/intel/fsp_baytrail/tsc_freq.c
index f002187..66fde22 100644
--- a/src/soc/intel/fsp_baytrail/tsc_freq.c
+++ b/src/soc/intel/fsp_baytrail/tsc_freq.c
@@ -16,7 +16,7 @@
#include <stdint.h>
#include <cpu/x86/msr.h>
#include <cpu/x86/tsc.h>
-#include <baytrail/msr.h>
+#include <soc/msr.h>
unsigned bus_freq_khz(void)
{
@@ -49,9 +49,9 @@ unsigned long tsc_freq_mhz(void)
#if !defined(__SMM__)
#if !defined(__PRE_RAM__)
-#include <baytrail/ramstage.h>
+#include <soc/ramstage.h>
#else
-#include <baytrail/romstage.h>
+#include <soc/romstage.h>
#endif
void set_max_freq(void)
OpenPOWER on IntegriCloud