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| author | Paul Menzel <paulepanter@users.sourceforge.net> | 2014-04-10 19:50:58 +0200 |
|---|---|---|
| committer | Alexandru Gagniuc <mr.nuke.me@gmail.com> | 2014-04-11 15:21:03 +0200 |
| commit | eb4920df327fd7d3ac9e9f853768b15e9a02a9b1 (patch) | |
| tree | 744711b83defe1c2d8d49e4c1082c0cf07b31a6f | |
| parent | 6b583a454c24c0c8fb41da9eaef52a830e83b3e4 (diff) | |
| download | coreboot-staging-eb4920df327fd7d3ac9e9f853768b15e9a02a9b1.zip coreboot-staging-eb4920df327fd7d3ac9e9f853768b15e9a02a9b1.tar.gz | |
intel/*bd82x6x/acpi/pch.asl: Correct name of field unit to GP03
GP0e does not fit into the naming scheme of the field units surrounding
this field unit definition. Also the keys for e and 3 are close to each
other supporting the theory that this is indeed a typo.
Change-Id: I43cf288fe1e0240b33971073c1aa8a1db5762e31
Reported-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/5483
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Idwer Vollering <vidwer@gmail.com>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
| -rw-r--r-- | src/southbridge/intel/bd82x6x/acpi/pch.asl | 2 | ||||
| -rw-r--r-- | src/southbridge/intel/fsp_bd82x6x/acpi/pch.asl | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/pch.asl b/src/southbridge/intel/bd82x6x/acpi/pch.asl index 2f75fdc..27f08e2 100644 --- a/src/southbridge/intel/bd82x6x/acpi/pch.asl +++ b/src/southbridge/intel/bd82x6x/acpi/pch.asl @@ -95,7 +95,7 @@ Scope(\) GL00, 1, GP01, 1, GP02, 1, - GP0e, 1, + GP03, 1, GP04, 1, GP05, 1, GP06, 1, diff --git a/src/southbridge/intel/fsp_bd82x6x/acpi/pch.asl b/src/southbridge/intel/fsp_bd82x6x/acpi/pch.asl index 8632ad8..1a5163e 100644 --- a/src/southbridge/intel/fsp_bd82x6x/acpi/pch.asl +++ b/src/southbridge/intel/fsp_bd82x6x/acpi/pch.asl @@ -95,7 +95,7 @@ Scope(\) GL00, 1, GP01, 1, GP02, 1, - GP0e, 1, + GP03, 1, GP04, 1, GP05, 1, GP06, 1, |
