diff options
Diffstat (limited to 'meta-facebook/meta-yosemite/recipes-yosemite/fbutils/files/setup-gpio.sh')
| -rwxr-xr-x | meta-facebook/meta-yosemite/recipes-yosemite/fbutils/files/setup-gpio.sh | 102 |
1 files changed, 98 insertions, 4 deletions
diff --git a/meta-facebook/meta-yosemite/recipes-yosemite/fbutils/files/setup-gpio.sh b/meta-facebook/meta-yosemite/recipes-yosemite/fbutils/files/setup-gpio.sh index 91797c5..10aad30 100755 --- a/meta-facebook/meta-yosemite/recipes-yosemite/fbutils/files/setup-gpio.sh +++ b/meta-facebook/meta-yosemite/recipes-yosemite/fbutils/files/setup-gpio.sh @@ -106,6 +106,20 @@ devmem_clear_bit $(scu_addr 80) 8 gpio_export B0 +# Enable P3V3: GPIOS1(145) +# To use GPIOS1 (145), SCU8C[1], SCU94[0], and SCU94[1] must be 0 +devmem_clear_bit $(scu_addr 8C) 1 +devmem_clear_bit $(scu_addr 94) 0 +devmem_clear_bit $(scu_addr 94) 1 + +gpio_set S1 1 + +# PWRGD_P3V3: GPIOS2(146) +# To use GPIOS2 (146), SCU8C[2], SCU94[0], and SCU94[1] must be 0 +devmem_clear_bit $(scu_addr 8C) 2 +devmem_clear_bit $(scu_addr 94) 0 +devmem_clear_bit $(scu_addr 94) 1 + # Setup GPIOs to Mux Enable: GPIOS3(147), Channel Select: GPIOE4(36), GPIOE5(37) # To use GPIOS3 (147), SCU8C[3], SCU94[0], and SCU94[1] must be 0 @@ -123,11 +137,11 @@ devmem_clear_bit $(scu_addr 80) 21 devmem_clear_bit $(scu_addr 8C) 14 devmem_clear_bit $(scu_addr 70) 22 -gpio_export S3 -gpio_export E4 -gpio_export E5 +gpio_set S3 0 +gpio_set E4 1 +gpio_set E5 0 -# BMC_HEARTBEAT_N, heartbeat LED, GPIO Q7 +# BMC_HEARTBEAT_N, heartbeat LED, GPIO Q7(135) devmem_clear_bit $(scu_addr 90) 28 gpio_export Q7 @@ -204,6 +218,34 @@ devmem_clear_bit $(scu_addr 84) 27 gpio_set M3 1 + +# Identify LED for Slot#2: +# To use GPIOF0 (40), SCU80[24] must be 0 +devmem_clear_bit $(scu_addr 80) 24 + +gpio_set F0 1 + +# Identify LED for Slot#1: +# To use GPIOF1 (41), SCU80[25], SCUA4[12], must be 0 +devmem_clear_bit $(scu_addr 80) 25 +devmem_clear_bit $(scu_addr A4) 12 + +gpio_set F1 1 + +# Identify LED for Slot#4: +# To use GPIOF2 (42), SCU80[26], SCUA4[13], must be 0 +devmem_clear_bit $(scu_addr 80) 26 +devmem_clear_bit $(scu_addr A4) 13 + +gpio_set F2 1 + +# Identify LED for Slot#3: +# To use GPIOF3 (43), SCU80[27], SCUA4[14], must be 0 +devmem_clear_bit $(scu_addr 80) 27 +devmem_clear_bit $(scu_addr A4) 14 + +gpio_set F3 1 + # Front Panel Hand Switch GPIO setup # HAND_SW_ID1: GPIOR2(138) # To use GPIOR2, SCU88[26] must be 0 @@ -305,3 +347,55 @@ gpio_set H3 1 # RST_SLOT4_SYS_RESET_N: GPIOH2 (58) # To use GPIOH2, SCU90[6], SCU90[7] must be 0 gpio_set H2 1 + +# 12V_STBY Enable for Slots + +# P12V_STBY_SLOT1_EN: GPIOO5 (117) +# To use GPIOO5, SCU88[13] must be 0 +devmem_clear_bit $(scu_addr 88) 13 + +gpio_set O5 1 + +# P12V_STBY_SLOT2_EN: GPIOO4 (116) +# To use GPIOO4, SCU88[12] must be 0 +devmem_clear_bit $(scu_addr 88) 12 + +gpio_set O4 1 + +# P12V_STBY_SLOT3_EN: GPIOO7 (119) +# To use GPIOO7, SCU88[15] must be 0 +devmem_clear_bit $(scu_addr 88) 15 + +gpio_set O7 1 + +# P12V_STBY_SLOT4_EN: GPIOO6 (118) +# To use GPIOO6, SCU88[13] must be 0 +devmem_clear_bit $(scu_addr 88) 14 + +gpio_set O6 1 + +# PWRGD_P12V_STBY_SLOT1: GPIOP1 (121) +# To use GPIOP1, SCU88[17] must be 0 +devmem_clear_bit $(scu_addr 88) 17 +gpio_export P1 + +# PWRGD_P12V_STBY_SLOT2: GPIOP0 (120) +# To use GPIOP0, SCU88[16] must be 0 +devmem_clear_bit $(scu_addr 88) 16 +gpio_export P0 + +# PWRGD_P12V_STBY_SLOT3: GPIOP3 (123) +# To use GPIOP3, SCU88[19] must be 0 +devmem_clear_bit $(scu_addr 88) 19 +gpio_export P3 + +# PWRGD_P12V_STBY_SLOT4: GPIOP2 (122) +# To use GPIOP2, SCU88[18] must be 0 +devmem_clear_bit $(scu_addr 88) 18 +gpio_export P2 + +# TODO: Enable this pin after the HW issue is fixed +# Enable the the EXTRST functionality of GPIOB7 +#devmem_set_bit $(scu_addr 80) 15 +#devmem_clear_bit $(scu_addr 90) 31 +#devmem_set_bit $(scu_addr 3c) 3 |
