From 823096e5270dc7ccd8b0315377428556d1987dcf Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Wed, 20 Aug 2014 15:39:38 +0000 Subject: Add support for Intel Wildcat Point PCH The Wildcat Point PCH can be paired with Broadwell or Haswell. This patch was essentially backported from ChromiumOS commit 9bd2af8. Corresponding to flashrom svn r1845. Signed-off-by: Duncan Laurie Signed-off-by: Stefan Tauner Acked-by: Stefan Tauner --- util/ich_descriptors_tool/ich_descriptors_tool.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'util/ich_descriptors_tool') diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c index 78cb15b..b6c1b12 100644 --- a/util/ich_descriptors_tool/ich_descriptors_tool.c +++ b/util/ich_descriptors_tool/ich_descriptors_tool.c @@ -123,6 +123,7 @@ static void usage(char *argv[], char *error) "\t- \"6\" or \"cougar\" for Intel's 6 series chipsets,\n" "\t- \"7\" or \"panther\" for Intel's 7 series chipsets.\n" "\t- \"8\" or \"lynx\" for Intel's 8 series chipsets.\n" +"\t- \"9\" or \"wildcat\" for Intel's 9 series chipsets.\n" "If '-d' is specified some regions such as the BIOS image as seen by the CPU or\n" "the GbE blob that is required to initialize the GbE are also dumped to files.\n", argv[0], argv[0]); @@ -205,6 +206,9 @@ int main(int argc, char *argv[]) cs = CHIPSET_8_SERIES_LYNX_POINT; else if ((strcmp(csn, "silvermont") == 0)) cs = CHIPSET_BAYTRAIL; + else if ((strcmp(csn, "9") == 0) || + (strcmp(csn, "wildcat") == 0)) + cs = CHIPSET_9_SERIES_WILDCAT_POINT; } ret = read_ich_descriptors_from_dump(buf, len, &desc); -- cgit v1.1