From 0466c819e248881e03a6ec98db5297565816859b Mon Sep 17 00:00:00 2001 From: Stefan Tauner Date: Sun, 16 Jun 2013 10:30:08 +0000 Subject: sbxxx: spibar[0] debug print refinements Newer models support a 66 MHz clock and fast reads. We should probably distinguish the models better (as we do in ichspi) and add support for frequency selection etc. For now this has to suffice. Corresponding to flashrom svn r1678. Signed-off-by: Stefan Tauner Acked-by: Stefan Tauner --- sb600spi.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'sb600spi.c') diff --git a/sb600spi.c b/sb600spi.c index fe60aa9..a5c00d8 100644 --- a/sb600spi.c +++ b/sb600spi.c @@ -211,7 +211,7 @@ int sb600_probe_spi(struct pci_dev *dev) uint32_t tmp; uint8_t reg; static const char *const speed_names[4] = { - "Reserved", "33", "22", "16.5" + "66/reserved", "33", "22", "16.5" }; /* Read SPI_BaseAddr */ @@ -250,9 +250,10 @@ int sb600_probe_spi(struct pci_dev *dev) * SB700 or later, reads and writes will be corrupted. Abort in this * case. Make sure to avoid this check on SB600. */ - msg_pdbg("SpiArbEnable=%i, SpiAccessMacRomEn=%i, " + msg_pdbg("(0x%08" PRIx32 ") fastReadEnable=%u, SpiArbEnable=%i, SpiAccessMacRomEn=%i, " "SpiHostAccessRomEn=%i, ArbWaitCount=%i, " "SpiBridgeDisable=%i, DropOneClkOnRd=%i\n", + tmp, (tmp >> 18) & 0x1, (tmp >> 19) & 0x1, (tmp >> 22) & 0x1, (tmp >> 23) & 0x1, (tmp >> 24) & 0x7, (tmp >> 27) & 0x1, (tmp >> 28) & 0x1); -- cgit v1.1