From eaacd2d4e7485d747e4e0bbd54b7bb44cf3fd179 Mon Sep 17 00:00:00 2001 From: Carl-Daniel Hailfinger Date: Wed, 9 Nov 2011 23:40:00 +0000 Subject: Register Parallel/LPC/FWH programmers the same way SPI programmers are registered All programmers are now calling programmer registration functions and direct manipulations of buses_supported are not needed/possible anymore. Note: Programmers without parallel/LPC/FWH chip support should not call register_par_programmer(). Additional fixes: Set max_rom_decode.parallel for drkaiser. Remove abuse of programmer_map_flash_region in it85spi. Annotate several FIXMEs in it85spi. Corresponding to flashrom svn r1463. Signed-off-by: Carl-Daniel Hailfinger Acked-by: Michael Karcher --- nicintel.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) (limited to 'nicintel.c') diff --git a/nicintel.c b/nicintel.c index f94cbc9..b20f856 100644 --- a/nicintel.c +++ b/nicintel.c @@ -43,6 +43,17 @@ const struct pcidev_status nics_intel[] = { #define CSR_FCR 0x0c +static const struct par_programmer par_programmer_nicintel = { + .chip_readb = nicintel_chip_readb, + .chip_readw = fallback_chip_readw, + .chip_readl = fallback_chip_readl, + .chip_readn = fallback_chip_readn, + .chip_writeb = nicintel_chip_writeb, + .chip_writew = fallback_chip_writew, + .chip_writel = fallback_chip_writel, + .chip_writen = fallback_chip_writen, +}; + static int nicintel_shutdown(void *data) { physunmap(nicintel_control_bar, NICINTEL_CONTROL_MEMMAP_SIZE); @@ -93,9 +104,8 @@ int nicintel_init(void) */ pci_rmmio_writew(0x0001, nicintel_control_bar + CSR_FCR); - buses_supported = BUS_PARALLEL; - max_rom_decode.parallel = NICINTEL_MEMMAP_SIZE; + register_par_programmer(&par_programmer_nicintel, BUS_PARALLEL); return 0; -- cgit v1.1