From eb58257b9650b9191d8b987e0b214fed1ad2b77a Mon Sep 17 00:00:00 2001 From: Stefan Tauner Date: Fri, 21 Sep 2012 12:52:50 +0000 Subject: Add a bunch of new/tested stuff and various small changes 14 Tested Mainboards: OK: - ASUS M3A78-EH http://www.flashrom.org/pipermail/flashrom/2010-October/005297.html - ASUS P2B-LS http://www.flashrom.org/pipermail/flashrom/2010-November/005506.html - Biostar TA790GX A3+ http://paste.flashrom.org/view.php?id=1350 - ECS 848P-A7 http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html - GIGABYTE GA-G41MT-S2PT Reported on IRC - GIGABYTE GA-H77-D3H Reported and tested by Alexander Gordeev on IRC. - Gigabyte GA-X79-UD5 http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html - Shuttle FN78S http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - VIA EITX-3000 Reported on IRC by Tuju NOT OK: - Dell PowerEdge C6220 (0HYFFG) http://www.flashrom.org/pipermail/flashrom/2012-September/009900.html - Foxconn Q45M http://www.flashrom.org/pipermail/flashrom/2012-September/009923.html - MSI MS-7309 (K9N6SGM-V) http://www.flashrom.org/pipermail/flashrom/2012-August/009712.html - Supermicro X9QRi-F+ http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - ZOTAC H61-ITX WiFi (H61ITX-A-E) http://www.flashrom.org/pipermail/flashrom/2012-August/009649.html ASUS CUSL2-C has been tested to be working with the board enable once implemented for the TUSL2-C board. They seem to have the same PCI IDs as shown in the links below. Since only the CUSL2-C board enable has been tested yet, we distinguish the two by DMI strings. http://paste.flashrom.org/view.php?id=1393 http://www.flashrom.org/pipermail/flashrom/attachments/20091206/ddca2c6c/attachment-0002.eml Tested flash chips: - Set EMST F25L008A to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - Set GigaDevice GD25Q64 to PREW (+PREW) http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commit;h=9e8ef49b1f626c2197e131fba6c5b65c8af4eeea - Set Macronix MX25L12805 to P (+P) http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - Set SST SST49LF003A/B to PREW (+EW) http://paste.flashrom.org/view.php?id=467 - Set Winbond W49V002FA to PREW (+EW) http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html Tested chipsets: - Intel X79 (0x1d41) http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html Board enables: - add ASUS P4P800-X Created by Idwer Vollering and tested by Mingsen Bao: http://paste.flashrom.org/view.php?id=467 - add DMI string to P4P800-VM Miscellaneous: - Add remaining Intel 7 series chipset (LPC) PCI IDs - Add generic SPI detection for chips from Winbond - Minor manpage changes - Minor other cleanups - Escape full stops after abbreviations in the manpage. - Add ICH9 and successors to spi_get_valid_read_addr Corresponding to flashrom svn r1601. Signed-off-by: Stefan Tauner Acked-by: Stefan Tauner --- flashrom.8 | 23 ++++++++++++----------- 1 file changed, 12 insertions(+), 11 deletions(-) (limited to 'flashrom.8') diff --git a/flashrom.8 b/flashrom.8 index cf07ccf..2519a78 100644 --- a/flashrom.8 +++ b/flashrom.8 @@ -291,8 +291,9 @@ contents (using .BR \-r ) and store it to a medium outside of your computer, like a USB drive or a network share. If you needed to run the board enable code -already for probing, use it for reading too. Now you can try to write the -new image. You should enable the board enable code in any case now, as it +already for probing, use it for reading too. +If reading succeeds and the contens of the read file look legit you can try to write the new image. +You should enable the board enable code in any case now, as it has been written because it is known that writing/erasing without the board enable is going to fail. In any case (success or failure), please report to the flashrom mailing list, see below. @@ -326,7 +327,7 @@ report so we can diagnose the problem. .B Intel chipsets .sp If you have an Intel chipset with an ICH8 or later southbridge with SPI flash -attached, and if a valid descriptor was written to it (e.g. by the vendor), the +attached, and if a valid descriptor was written to it (e.g.\& by the vendor), the chipset provides an alternative way to access the flash chip(s) named .BR "Hardware Sequencing" . It is much simpler than the normal access method (called @@ -341,7 +342,7 @@ syntax where .BR auto ", " swseq " or " hwseq . By default .RB "(or when setting " ich_spi_mode=auto ) -the module tries to use swseq and only activates hwseq if need be (e.g. if +the module tries to use swseq and only activates hwseq if need be (e.g.\& if important opcodes are inaccessible due to lockdown; or if more than one flash chip is attached). The other options (swseq, hwseq) select the respective mode (if possible). @@ -482,7 +483,7 @@ the .sp syntax where .B size -is the number of bytes (min. 1, max. 256). +is the number of bytes (min.\& 1, max.\& 256). .sp Example: .sp @@ -498,7 +499,7 @@ flash chip, you can specify a blacklist of SPI commands with the syntax where .B commandlist is a list of two-digit hexadecimal representations of -SPI commands. If commandlist is e.g. 0302, flashrom will behave as if the SPI +SPI commands. If commandlist is e.g.\& 0302, flashrom will behave as if the SPI controller refuses to run command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512 characters (256 commands) long. Implementation note: flashrom will detect an error during command execution. @@ -514,7 +515,7 @@ you can specify an ignorelist of SPI commands with the syntax where .B commandlist is a list of two-digit hexadecimal representations of -SPI commands. If commandlist is e.g. 0302, the emulated flash chip will ignore +SPI commands. If commandlist is e.g.\& 0302, the emulated flash chip will ignore command 0x03 (READ) and command 0x02 (WRITE). commandlist may be up to 512 characters (256 commands) long. Implementation note: flashrom won't detect an error during command execution. @@ -723,7 +724,7 @@ is installed in your system, you have to specify the PCI address of the card you want to use with the .B pci= parameter as explained in the -.B nic3com +.B nic3com et al.\& section above. .sp More information about the hardware is available at @@ -828,11 +829,11 @@ Many of the developers communicate via the IRC channel on .BR chat.freenode.net . You are welcome to join and ask questions, send us bug and success reports there -too. Please provide a way to contact you later (e.g. a mail address) and be +too. Please provide a way to contact you later (e.g.\& a mail address) and be patient if there is no immediate reaction. Also, we provide a pastebin service at .B http://paste.flashrom.org -that is very useful when you want to share logs etc. without spamming the +that is very useful when you want to share logs etc.\& without spamming the channel. .SS .B Laptops @@ -853,7 +854,7 @@ One-time programmable (OTP) memory and unique IDs .sp Some flash chips contain OTP memory often denoted as "security registers". They usually have a capacity in the range of some bytes to a few hundred -bytes and can be used to give devices unique IDs etc. flashrom is not able +bytes and can be used to give devices unique IDs etc. flashrom is not able to read or write these memories and may therefore not be able to duplicate a chip completely. For chip types known to include OTP memories a warning is printed when they are detected. -- cgit v1.1