From ca081461af3b51cc30c33e48325ec2636fcbbf91 Mon Sep 17 00:00:00 2001 From: Andrew Morgan Date: Tue, 13 Sep 2011 22:05:44 +0000 Subject: Add probe/read support for the Catalyst CAT28F512 chip Write and erase are NOT yet supported! Probe and read are tested by Andrew Morgan and Uwe Hermann on Intel NICs. Corresponding to flashrom svn r1439. Signed-off-by: Andrew Morgan Acked-by: Uwe Hermann --- flashchips.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+) (limited to 'flashchips.c') diff --git a/flashchips.c b/flashchips.c index f3cca35..d520a1c 100644 --- a/flashchips.c +++ b/flashchips.c @@ -2341,6 +2341,30 @@ const struct flashchip flashchips[] = { }, { + .vendor = "Catalyst", + .name = "CAT28F512", + .bustype = BUS_PARALLEL, + .manufacture_id = CATALYST_ID, + .model_id = CATALYST_CAT28F512, + .total_size = 64, + .page_size = 0, /* unused */ + .feature_bits = 0, + .tested = TEST_OK_PR, + .probe = probe_jedec, /* FIXME! */ + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { {64 * 1024, 1} }, + .block_erase = NULL, /* TODO */ + }, + }, + .write = NULL, /* TODO */ + .read = read_memmapped, + .voltage = {4500, 5500}, + }, + + { .vendor = "Bright", .name = "BM29F040", .bustype = BUS_PARALLEL, -- cgit v1.1