From 2cf2da6e5b6cfe1d229c624b2847c59b8cc57b5c Mon Sep 17 00:00:00 2001 From: Stefan Tauner Date: Sat, 18 Jun 2011 18:45:56 +0000 Subject: Add intel 6 series pci ids to chipset_enables As defined by Intel 6 Series Chipset and Intel C200 Series Chipset Specification Update; document number 324646-006, May 2011. Corresponding to flashrom svn r1344. Signed-off-by: Stefan Tauner Acked-by: Uwe Hermann --- chipset_enable.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'chipset_enable.c') diff --git a/chipset_enable.c b/chipset_enable.c index b8ce165..0c77f07 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -1121,6 +1121,21 @@ const struct penable chipset_enables[] = { {0x1166, 0x0205, OK, "Broadcom", "HT-1000", enable_flash_ht1000}, {0x8086, 0x122e, OK, "Intel", "PIIX", enable_flash_piix4}, {0x8086, 0x1234, NT, "Intel", "MPIIX", enable_flash_piix4}, + {0x8086, 0x1c44, NT, "Intel", "Z68", enable_flash_ich10}, + {0x8086, 0x1c46, NT, "Intel", "P67", enable_flash_ich10}, + {0x8086, 0x1c47, NT, "Intel", "UM67", enable_flash_ich10}, + {0x8086, 0x1c49, NT, "Intel", "HM65", enable_flash_ich10}, + {0x8086, 0x1c4a, NT, "Intel", "H67", enable_flash_ich10}, + {0x8086, 0x1c4b, NT, "Intel", "HM67", enable_flash_ich10}, + {0x8086, 0x1c4c, NT, "Intel", "Q65", enable_flash_ich10}, + {0x8086, 0x1c4d, NT, "Intel", "QS67", enable_flash_ich10}, + {0x8086, 0x1c4e, NT, "Intel", "Q67", enable_flash_ich10}, + {0x8086, 0x1c4f, NT, "Intel", "QM67", enable_flash_ich10}, + {0x8086, 0x1c50, NT, "Intel", "B65", enable_flash_ich10}, + {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_ich10}, + {0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_ich10}, + {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_ich10}, + {0x8086, 0x1c5c, NT, "Intel", "H61", enable_flash_ich10}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, -- cgit v1.1