From 2abab94c18721181c8d517b8e31ffada22145ea9 Mon Sep 17 00:00:00 2001 From: Stefan Tauner Date: Fri, 27 Apr 2012 20:41:23 +0000 Subject: Add a bunch of new/tested stuff and various small changes 12 Tested Mainboards: OK: - ASUS M4A785T-M http://www.flashrom.org/pipermail/flashrom/2012-April/009118.html - ASUS P5VD2-MX http://www.flashrom.org/pipermail/flashrom/2012-March/009014.html - ASUS P8Z68-V PRO/GEN3 http://www.flashrom.org/pipermail/flashrom/2012-April/009086.html - Bachmann electronic OT200 http://www.flashrom.org/pipermail/flashrom/2012-April/009094.html - Biostar N61PB-M2S http://www.flashrom.org/pipermail/flashrom/2012-March/008958.html - GIGABYTE GA-H61M-D2-B3 http://www.flashrom.org/pipermail/flashrom/2012-March/009002.html - MSI MS-7740 (H61MA-E35(B3)) http://www.flashrom.org/pipermail/flashrom/2012-March/008985.html - Tyan S2875 (Tiger K8W) http://www.flashrom.org/pipermail/flashrom/2012-March/008986.html - ZOTAC nForce 630i Supreme (N73U-Supreme) http://www.flashrom.org/pipermail/flashrom/2012-April/009073.html - ZOTAC ZBOX AD02 (PLUS) http://www.flashrom.org/pipermail/flashrom/2012-April/009047.html NOT OK: - ASRock H67M http://www.flashrom.org/pipermail/flashrom/2012-March/008909.html - ASUS P8P67 LE http://paste.flashrom.org/view.php?id=1097 - ASUS Maximus IV Extreme http://www.flashrom.org/pipermail/flashrom/2012-March/009033.html - Biostar H61MU3 http://www.flashrom.org/pipermail/flashrom/2012-February/008832.html - Biostar M7VIQ http://www.flashrom.org/pipermail/flashrom/2012-February/008863.html - Dell Inspiron 580 http://www.flashrom.org/pipermail/flashrom/2012-March/008888.html - Dell Vostro 460 http://www.flashrom.org/pipermail/flashrom/2012-April/009144.html - Fujitsu-Siemens CELSIUS W410 (D3062-A1) http://www.flashrom.org/pipermail/flashrom/2012-March/008987.html - EPoX EP-3PTA http://www.flashrom.org/pipermail/flashrom/2012-April/009043.html - HP XW6400 http://www.flashrom.org/pipermail/flashrom/2012-March/009006.html - HP XW9300 http://www.flashrom.org/pipermail/flashrom/2012-February/008862.html - Intel DG965OT http://paste.flashrom.org/view.php?id=1096 - Intel DN2800MT (Marshalltown) http://www.flashrom.org/pipermail/flashrom/2012-April/009095.html - Lenovo T420 http://paste.flashrom.org/view.php?id=1095 - Lenovo X1 http://www.flashrom.org/pipermail/flashrom/2012-April/009135.html - MSI GF615M-P33 http://www.flashrom.org/pipermail/flashrom/2012-March/008956.html Tested flash chips: - mark EN25Q32(A/B) as TEST_OK_PROBE (+P) http://www.flashrom.org/pipermail/flashrom/2012-February/008832.html - mark S25FL032A as TEST_OK_PR (+PR) http://www.flashrom.org/pipermail/flashrom/2012-April/009105.html - mark AT25DF161 as TEST_OK_PROBE (+P) http://www.flashrom.org/pipermail/flashrom/2012-April/009095.html - mark SST as TEST_OK_PREW (+EW) http://www.flashrom.org/pipermail/flashrom/2012-April/009094.html Tested chipset enables: - H61 (various reports) - SiS 755 http://www.flashrom.org/pipermail/flashrom/2012-April/009072.html - Fix compilation of ich_descriptor_tool which was broken since r1492. - Add Documentation regarding unlocking the ME region on Intel chipsets. - Fix reading the flash descriptor via FDOC/FDOD and prettyprinting of the descriptor on boards with 5 active regions. - Reorder some boards in print.c. - Add Intel 7 Series (Panther Point) PCI IDs. - Add preliminary PCI IDs for future Intel chipsets (DH89xxCC and Lynx Point) see https://lkml.org/lkml/2012/2/20/467 - Change the message for untested chipsets to send only after an attempt to update the firmware with flashrom. - Fix warnings in ich_descriptor_tool's build. Corresponding to flashrom svn r1524. Signed-off-by: Stefan Tauner Acked-by: Stefan Tauner --- chipset_enable.c | 66 +++++++++++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 61 insertions(+), 5 deletions(-) (limited to 'chipset_enable.c') diff --git a/chipset_enable.c b/chipset_enable.c index 0aba1e0..5cfcd1b 100644 --- a/chipset_enable.c +++ b/chipset_enable.c @@ -636,6 +636,18 @@ static int enable_flash_pch6(struct pci_dev *dev, const char *name) return enable_flash_ich_dc_spi(dev, name, CHIPSET_6_SERIES_COUGAR_POINT); } +/* Panther Point aka. 7 series */ +static int enable_flash_pch7(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_dc_spi(dev, name, CHIPSET_7_SERIES_PANTHER_POINT); +} + +/* Lynx Point aka. 8 series */ +static int enable_flash_pch8(struct pci_dev *dev, const char *name) +{ + return enable_flash_ich_dc_spi(dev, name, CHIPSET_8_SERIES_LYNX_POINT); +} + static int via_no_byte_merge(struct pci_dev *dev, const char *name) { uint8_t val; @@ -1186,7 +1198,7 @@ const struct penable chipset_enables[] = { {0x1039, 0x0745, OK, "SiS", "745", enable_flash_sis540}, {0x1039, 0x0746, NT, "SiS", "746", enable_flash_sis540}, {0x1039, 0x0748, NT, "SiS", "748", enable_flash_sis540}, - {0x1039, 0x0755, NT, "SiS", "755", enable_flash_sis540}, + {0x1039, 0x0755, OK, "SiS", "755", enable_flash_sis540}, {0x1039, 0x5511, NT, "SiS", "5511", enable_flash_sis5511}, {0x1039, 0x5571, NT, "SiS", "5571", enable_flash_sis530}, {0x1039, 0x5591, NT, "SiS", "5591/5592", enable_flash_sis530}, @@ -1278,9 +1290,19 @@ const struct penable chipset_enables[] = { {0x8086, 0x1c52, NT, "Intel", "C202", enable_flash_pch6}, {0x8086, 0x1c54, NT, "Intel", "C204", enable_flash_pch6}, {0x8086, 0x1c56, NT, "Intel", "C206", enable_flash_pch6}, - {0x8086, 0x1c5c, NT, "Intel", "H61", enable_flash_pch6}, + {0x8086, 0x1c5c, OK, "Intel", "H61", enable_flash_pch6}, {0x8086, 0x1d40, OK, "Intel", "X79", enable_flash_pch6}, {0x8086, 0x1d41, NT, "Intel", "X79", enable_flash_pch6}, + {0x8086, 0x1e44, NT, "Intel", "Z77", enable_flash_pch7}, + {0x8086, 0x1e46, NT, "Intel", "Z75", enable_flash_pch7}, + {0x8086, 0x1e49, NT, "Intel", "B75", enable_flash_pch7}, + {0x8086, 0x1e4a, NT, "Intel", "H77", enable_flash_pch7}, + {0x8086, 0x1e57, NT, "Intel", "HM77", enable_flash_pch7}, + {0x8086, 0x1e58, NT, "Intel", "UM77", enable_flash_pch7}, + {0x8086, 0x1e59, NT, "Intel", "HM76", enable_flash_pch7}, + {0x8086, 0x1e5d, NT, "Intel", "HM75", enable_flash_pch7}, + {0x8086, 0x1e5e, NT, "Intel", "HM70", enable_flash_pch7}, + {0x8086, 0x2310, NT, "Intel", "DH89xxCC", enable_flash_pch7}, {0x8086, 0x2410, OK, "Intel", "ICH", enable_flash_ich_4e}, {0x8086, 0x2420, OK, "Intel", "ICH0", enable_flash_ich_4e}, {0x8086, 0x2440, OK, "Intel", "ICH2", enable_flash_ich_4e}, @@ -1342,6 +1364,38 @@ const struct penable chipset_enables[] = { {0x8086, 0x7198, OK, "Intel", "440MX", enable_flash_piix4}, {0x8086, 0x8119, OK, "Intel", "SCH Poulsbo", enable_flash_poulsbo}, {0x8086, 0x8186, OK, "Intel", "Atom E6xx(T)/Tunnel Creek", enable_flash_tunnelcreek}, + {0x8086, 0x8c40, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c41, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c42, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c43, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c44, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c45, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c46, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c47, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c48, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c49, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c4a, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c4b, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c4c, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c4d, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c4e, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c4f, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c50, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c51, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c52, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c53, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c54, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c55, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c56, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c57, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c58, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c59, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c5a, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c5b, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c5c, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c5d, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c5e, NT, "Intel", "Lynx Point", enable_flash_pch8}, + {0x8086, 0x8c5f, NT, "Intel", "Lynx Point", enable_flash_pch8}, #endif {}, }; @@ -1380,9 +1434,11 @@ int chipset_flash_enable(void) if (chipset_enables[i].status == NT) { msg_pinfo("\nThis chipset is marked as untested. If " "you are using an up-to-date version\nof " - "flashrom please email a report to " - "flashrom@flashrom.org including a\nverbose " - "(-V) log. Thank you!\n"); + "flashrom *and* were (not) able to " + "successfully update your firmware with it,\n" + "then please email a report to " + "flashrom@flashrom.org including a verbose " + "(-V) log.\nThank you!\n"); } msg_pinfo("Enabling flash write... "); ret = chipset_enables[i].doit(dev, -- cgit v1.1