From 4784c47a882247c107ba2e1c3c63e71b7d78e844 Mon Sep 17 00:00:00 2001 From: Nikolay Petukhov Date: Sat, 17 May 2008 01:08:58 +0000 Subject: Support Pm49FL004/2 Block Locking Registers The PMC chips understand both LPC and FWH flash commands. When in FWH mode (MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block Locking Registers by default lock the flash chip for write and erase - in addition to any chipset write protection. This patch adds unlock operations before Pm49FL004/2 write and erase, and it includes an svn mv pm49fl004.c pm49fl00x.c Thanks go to Nikolay for this patch. Corresponding to flashrom svn r243 and coreboot v2 svn r3332. Signed-off-by: Nikolay Petukhov Signed-off-by: Peter Stuge Acked-by: Bari Ari --- Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Makefile') diff --git a/Makefile b/Makefile index 35b891d..a645d4c 100644 --- a/Makefile +++ b/Makefile @@ -22,7 +22,7 @@ endif OBJS = chipset_enable.o board_enable.o udelay.o jedec.o stm50flw0x0x.c \ sst28sf040.o am29f040b.o mx29f002.o sst39sf020.o m29f400bt.o \ - w49f002u.o 82802ab.o msys_doc.o pm49fl004.o sst49lf040.o \ + w49f002u.o 82802ab.o msys_doc.o pm49fl00x.o sst49lf040.o \ sst49lfxxxc.o sst_fwhub.o layout.o cbtable.o flashchips.o \ flashrom.o w39v080fa.o sharplhf00l04.o w29ee011.o spi.o it87spi.o \ ichspi.o -- cgit v1.1