From c753e5bbf9805ea2ec703e5013705a438747f223 Mon Sep 17 00:00:00 2001 From: Carl-Daniel Hailfinger Date: Sat, 5 Feb 2011 12:11:17 +0000 Subject: Add support for some AMD Am29LV* chips Add support for AMD Am29LV001BB, Am29LV001BT, Am29LV002BB, Am29LV002BT, Am29LV004BB, Am29LV004BT, Am29LV008BB, Am29LV008BT. Thanks to Mark Pustjens for testing the Am29LV001BB. Corresponding to flashrom svn r1260. Signed-off-by: Carl-Daniel Hailfinger Acked-by: Stefan Reinauer --- flashchips.c | 246 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ flashchips.h | 2 + 2 files changed, 248 insertions(+) diff --git a/flashchips.c b/flashchips.c index 873b8f2..6d4f61a 100644 --- a/flashchips.c +++ b/flashchips.c @@ -224,6 +224,252 @@ struct flashchip flashchips[] = { { .vendor = "AMD", + .name = "Am29LV001BB", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = AMD_ID, + .model_id = AMD_AM29LV001BB, + .total_size = 128, + .page_size = 64 * 1024, /* unused */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_OK_PREW, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {8 * 1024, 1}, + {4 * 1024, 2}, + {16 * 1024, 7}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { + .vendor = "AMD", + .name = "Am29LV001BT", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = AMD_ID, + .model_id = AMD_AM29LV001BT, + .total_size = 128, + .page_size = 64 * 1024, /* unused */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {16 * 1024, 7}, + {4 * 1024, 2}, + {8 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {128 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { + .vendor = "AMD", + .name = "Am29LV002BB", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = AMD_ID, + .model_id = AMD_AM29LV002BB, + .total_size = 256, + .page_size = 64 * 1024, /* unused */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {16 * 1024, 1}, + {8 * 1024, 2}, + {32 * 1024, 1}, + {64 * 1024, 3}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { + .vendor = "AMD", + .name = "Am29LV002BT", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = AMD_ID, + .model_id = AMD_AM29LV002BT, + .total_size = 256, + .page_size = 64 * 1024, /* unused */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 3}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {256 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { + .vendor = "AMD", + .name = "Am29LV004BB", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = AMD_ID, + .model_id = AMD_AM29LV004BB, + .total_size = 512, + .page_size = 64 * 1024, /* unused */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {16 * 1024, 1}, + {8 * 1024, 2}, + {32 * 1024, 1}, + {64 * 1024, 7}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { + .vendor = "AMD", + .name = "Am29LV004BT", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = AMD_ID, + .model_id = AMD_AM29LV004BT, + .total_size = 512, + .page_size = 64 * 1024, /* unused */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 7}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { + .vendor = "AMD", + .name = "Am29LV008BB", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = AMD_ID, + .model_id = AMD_AM29LV008BB, + .total_size = 1024, + .page_size = 64 * 1024, /* unused */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {16 * 1024, 1}, + {8 * 1024, 2}, + {32 * 1024, 1}, + {64 * 1024, 15}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { + .vendor = "AMD", + .name = "Am29LV008BT", + .bustype = CHIP_BUSTYPE_PARALLEL, + .manufacture_id = AMD_ID, + .model_id = AMD_AM29LV008BT, + .total_size = 1024, + .page_size = 64 * 1024, /* unused */ + .feature_bits = FEATURE_ADDR_2AA | FEATURE_SHORT_RESET, + .tested = TEST_UNTESTED, + .probe = probe_jedec, + .probe_timing = TIMING_ZERO, + .block_erasers = + { + { + .eraseblocks = { + {64 * 1024, 15}, + {32 * 1024, 1}, + {8 * 1024, 2}, + {16 * 1024, 1}, + }, + .block_erase = erase_sector_jedec, + }, { + .eraseblocks = { {1024 * 1024, 1} }, + .block_erase = erase_chip_block_jedec, + }, + }, + .write = write_jedec_1, + .read = read_memmapped, + }, + + { + .vendor = "AMD", .name = "Am29LV040B", .bustype = CHIP_BUSTYPE_PARALLEL, .manufacture_id = AMD_ID, diff --git a/flashchips.h b/flashchips.h index 6504edf..3bfbf07 100644 --- a/flashchips.h +++ b/flashchips.h @@ -70,6 +70,8 @@ #define AMD_AM29F400BT 0x23 #define AMD_AM29F800BB 0x58 #define AMD_AM29F800BT 0xD6 +#define AMD_AM29LV001BB 0x6D +#define AMD_AM29LV001BT 0xED #define AMD_AM29LV002BB 0xC2 #define AMD_AM29LV002BT 0x40 #define AMD_AM29LV004BB 0xB6 -- cgit v1.1