From b5b161b260b119d90a7f22e1c8ec1174de5eacf9 Mon Sep 17 00:00:00 2001 From: Carl-Daniel Hailfinger Date: Fri, 4 Jun 2010 19:05:39 +0000 Subject: Internal: introduce processor enables and abort if top/bottom alignment is unknown The internal programmer needs correct information about flash_base and chip window top/bottom alignment on non-x86 before it can be used. Abort any internal programmer action for now until the code is fixed. Add the concept of a processor enable for systems where flashing is impacted by processor settings or processor model. Corresponding to flashrom svn r1031. Signed-off-by: Carl-Daniel Hailfinger Acked-by: Uwe Hermann --- Makefile | 2 +- flash.h | 3 +++ internal.c | 36 ++++++++++++++++++++++++++++++++++-- processor_enable.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ 4 files changed, 83 insertions(+), 3 deletions(-) create mode 100644 processor_enable.c diff --git a/Makefile b/Makefile index 2180374..7ebdba6 100644 --- a/Makefile +++ b/Makefile @@ -124,7 +124,7 @@ CONFIG_PRINT_WIKI ?= no ifeq ($(CONFIG_INTERNAL), yes) FEATURE_CFLAGS += -D'CONFIG_INTERNAL=1' -PROGRAMMER_OBJS += chipset_enable.o board_enable.o cbtable.o dmi.o internal.o +PROGRAMMER_OBJS += processor_enable.o chipset_enable.o board_enable.o cbtable.o dmi.o internal.o # FIXME: The PROGRAMMER_OBJS below should only be included on x86. PROGRAMMER_OBJS += it87spi.o ichspi.o sb600spi.o wbsio_spi.o NEED_PCI := yes diff --git a/flash.h b/flash.h index 3b60173..84ee511 100644 --- a/flash.h +++ b/flash.h @@ -361,6 +361,9 @@ int board_flash_enable(const char *vendor, const char *part); /* chipset_enable.c */ int chipset_flash_enable(void); +/* processor_enable.c */ +int processor_flash_enable(void); + /* physmap.c */ void *physmap(const char *descr, unsigned long phys_addr, size_t len); void *physmap_try_ro(const char *descr, unsigned long phys_addr, size_t len); diff --git a/internal.c b/internal.c index d0eb782..9619618 100644 --- a/internal.c +++ b/internal.c @@ -165,16 +165,28 @@ int internal_init(void) pci_init(pacc); /* Initialize the PCI library */ pci_scan_bus(pacc); /* We want to get the list of devices */ - /* We look at the lbtable first to see if we need a + if (processor_flash_enable()) { + msg_perr("Processor detection/init failed.\n" + "Aborting.\n"); + return 1; + } + +#if defined(__i386__) || defined(__x86_64__) + /* We look at the cbtable first to see if we need a * mainboard specific flash enable sequence. */ coreboot_init(); -#if defined(__i386__) || defined(__x86_64__) dmi_init(); /* Probe for the Super I/O chip and fill global struct superio. */ probe_superio(); +#else + /* FIXME: Enable cbtable searching on all non-x86 platforms supported + * by coreboot. + * FIXME: Find a replacement for DMI on non-x86. + * FIXME: Enable Super I/O probing once port I/O is possible. + */ #endif /* Warn if a laptop is detected. */ @@ -200,6 +212,7 @@ int internal_init(void) } } +#if __FLASHROM_LITTLE_ENDIAN__ /* try to enable it. Failure IS an option, since not all motherboards * really need this to be done, etc., etc. */ @@ -220,7 +233,26 @@ int internal_init(void) * The error code might have been a warning only. * Besides that, we don't check the board enable return code either. */ +#if defined(__i386__) || defined(__x86_64__) return 0; +#else + msg_perr("Your platform is not supported yet for the internal " + "programmer due to missing\n" + "flash_base and top/bottom alignment information.\n" + "Aborting.\n"); + return 1; +#endif +#else + /* FIXME: Remove this unconditional abort once all PCI drivers are + * converted to use little-endian accesses for memory BARs. + */ + msg_perr("Your platform is not supported yet for the internal " + "programmer because it has\n" + "not been converted from native endian to little endian " + "access yet.\n" + "Aborting.\n"); + return 1; +#endif } int internal_shutdown(void) diff --git a/processor_enable.c b/processor_enable.c new file mode 100644 index 0000000..6623bb7 --- /dev/null +++ b/processor_enable.c @@ -0,0 +1,45 @@ +/* + * This file is part of the flashrom project. + * + * Copyright (C) 2010 Carl-Daniel Hailfinger + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + */ + +/* + * Contains the processor specific flash enables and system settings. + */ + +#include "flash.h" + +#if defined(__i386__) || defined(__x86_64__) + +int processor_flash_enable(void) +{ + /* On x86, flash access is not processor specific except on + * AMD Elan SC520, AMD Geode and maybe other SoC-style CPUs. + * FIXME: Move enable_flash_cs5536 and get_flashbase_sc520 here. + */ + return 0; +} + +#else + +int processor_flash_enable(void) +{ + /* Not implemented yet. Oh well. */ + return 1; +} + +#endif -- cgit v1.1