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* Add proper workaround for 3COM 3C90xB cards, which need special fixups (the ↵Uwe Hermann2009-05-161-0/+14
| | | | | | | | | | | | | | | | 3C90xC ones don't) This is tested on hardware. Also, add initial support for the Atmel AT29C010A chip (which I inserted in a 3COM 3C90xB card for testing). It can be detected, read works, erase works, but write will need some additional code (will post in another patch later). Corresponding to flashrom svn r520. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* SST25 chips do not support page program, only byte programCarl-Daniel Hailfinger2009-05-131-5/+5
| | | | | | | | | | Downgrade the chips from 256-byte writes to 1-byte writes. This fixes writing to them on ICH/VIA SPI masters. Corresponding to flashrom svn r504. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
* Winbond W39V040A TEST_OK_ PROBE READMateusz Murawski2009-05-131-1/+1
| | | | | | | | | Thanks to Mateusz for testing and reporting! Corresponding to flashrom svn r503. Signed-off-by: Mateusz Murawski <matowy@tlen.pl> Acked-by: Peter Stuge <peter@stuge.se>
* Mark SST 39VF512 as fully testedMateusz Murawski2009-05-131-1/+1
| | | | | | | | | | Tested with 3COM 3C905C: EtherLink 10/100 PCI (TX) http://www.coreboot.org/pipermail/coreboot/2009-May/048163.html Corresponding to flashrom svn r502. Signed-off-by: Mateusz Murawski <matowy@tlen.pl> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for 3COM NICs as "external programmer" and Atmel AT49BV512Uwe Hermann2009-05-131-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows flashrom to identify, read, write, erase and verify flash chips on (some) 3COM network cards. The patch uses the external programmer infrastructure, the network card is basically treated as an external flash programmer. Usage: $ ./flashrom -p nic3com flashrom v0.9.0-r498 Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400 Calibrating delay loop... OK. Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000. No operations were specified. $ ./flashrom -p nic3com -E flashrom v0.9.0-r498 Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400 Calibrating delay loop... OK. Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000. Erasing flash chip... SUCCESS. $ ./flashrom -p nic3com -wv backup.bin flashrom v0.9.0-r498 Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400 Calibrating delay loop... OK. Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000. Flash image seems to be a legacy BIOS. Disabling checks. Programming page: 1023 at address: 0x0000ffc0 Verifying flash... VERIFIED. $ ./flashrom -p nic3com -r backup.bin flashrom v0.9.0-r498 Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400 Calibrating delay loop... OK. Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000. Reading flash... done. I have tested this on actual hardware (see PCI IDs above) and all operations worked fine. Support for other 3COM cards will follow (I added some more which should be supportable by this code, but they're untested so far), as well as support for NICs from other vendors. The patch also adds support for the Atmel AT49BV512 which is soldered onto the 3COM NIC I used for testing. Corresponding to flashrom svn r499. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Mateusz Murawski <matowy@tlen.pl> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Unify write_39sf020() and write_49f002() functionsUwe Hermann2009-05-121-12/+12
| | | | | | | | | | The write_39sf020() and write_49f002() functions are identical except for whitespace differences, so drop one of them. Corresponding to flashrom svn r497. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Convert all flashchips.c entries with SPI programing to the 256-byte version ↵Carl-Daniel Hailfinger2009-05-091-57/+57
| | | | | | | | | | | | | by default Change the flashchips entry for SST SST25VF080B to 1-byte writing. Tested-by: Ali Nadalizadeh. Corresponding to flashrom svn r486. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Don't assume flash is accessible via MMIO for chips with no read functionCarl-Daniel Hailfinger2009-05-081-0/+96
| | | | | | | | | | | | | | | | Flashrom assumes that the flash chip contents are available via mmap if no read function is defined. This special case is handled in lots of places all over the code. Remove the special case and use the read_memmapped function. Not only does this allow us to fix a read bug in flashrom I recently uncovered on ICH SPI, it also allows us to add support for Paraflasher to flashrom. Corresponding to flashrom svn r473. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* SST25VF080B TEST_OK_ ERASE WRITEPeter Stuge2009-05-051-1/+1
| | | | | | | | | As reported by A. Spamlover. Thanks! Corresponding to flashrom svn r461. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* SST25VF080B TEST_OK_READPeter Stuge2009-05-041-1/+1
| | | | | | | | | Per report from from Henning Fleddermann. Thanks! Corresponding to flashrom svn r458. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Macronix MX25L1605 TEST_OK_ PROBE READ ERASE WRITEPeter Stuge2009-04-291-1/+1
| | | | | | | | | Per report from Aldrik Dunbar. Thanks! Corresponding to flashrom svn r446. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Support MX25L3235DStephan Guilloux2009-04-231-0/+14
| | | | | | | Corresponding to flashrom svn r441 and coreboot v2 svn r4200. Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Peter Stuge <peter@stuge.se>
* All "unknown xy SPI chip" entries claim to have status UNTESTED for ↵Carl-Daniel Hailfinger2009-04-221-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | probe/read/erase/write That is incorrect. A bit of confusion comes from how the #defines are named. We call them TEST_BAD_*, but the message printed by flashrom says: "This flash part has status NOT WORKING for operations:" Something that is unimplemented is definitely not working. Neither of the chip entries mentioned above has erase or write functions implemented, so erase and write are not working. Since their size is unknown, we can't read them in. That means read is not working as well. Probing is a different matter. If a chip-specific probe function had matched, we wouldn't have to handle the chip with the "unknown xy SPI chip" fallback. I'm tempted to call that "not working" as well, but I'm open to discussion on this point. Corresponding to flashrom svn r439 and coreboot v2 svn r4177. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Support Macronix MX2512805D flash chipStephan Guilloux2009-04-211-0/+14
| | | | | | | Corresponding to flashrom svn r437 and coreboot v2 svn r4150. Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Peter Stuge <peter@stuge.se>
* Trivial indent fixStephan Guilloux2009-04-211-1/+1
| | | | | | | Corresponding to flashrom svn r436 and coreboot v2 svn r4149. Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Peter Stuge <peter@stuge.se>
* After verification in datasheets, all MX25 accept the same opcodes 0x60 and ↵Stephan Guilloux2009-04-201-7/+8
| | | | | | | | | 0xC7 for Chip Erase Corresponding to flashrom svn r435 and coreboot v2 svn r4146. Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* MX25L1605 and 1635 accept Chip Erase opcodes 60 and C7Stephan Guilloux2009-04-191-2/+2
| | | | | | | Corresponding to flashrom svn r432 and coreboot v2 svn r4139. Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Peter Stuge <peter@stuge.se>
* Add MX25L1635D support, as discussed on #corebootStephan Guilloux2009-04-191-0/+13
| | | | | | | Corresponding to flashrom svn r431 and coreboot v2 svn r4138. Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Improve readability of Atmel AT45 commentsCarl-Daniel Hailfinger2009-03-191-27/+28
| | | | | | | | | | Move the Atmel AT45 comments about block and page sizes from the end of the struct to the individual struct members to improve readability. Corresponding to flashrom svn r422 and coreboot v2 svn r4020. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* Add SST25VF040.REMS with TEST_OK_ PROBE READZheng Bao2009-02-251-0/+14
| | | | | | | Corresponding to flashrom svn r417 and coreboot v2 svn r3958. Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Peter Stuge <peter@stuge.se>
* SST29EE020A TEST_OK_ PROBE READ ERASE WRITEPeter Stuge2009-02-221-1/+1
| | | | | | | | | Report by Holger Mickler. Thanks! Corresponding to flashrom svn r416 and coreboot v2 svn r3956. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Driver for ST M29F002T/NT/BPeter Stuge2009-01-261-5/+5
| | | | | | | | | | | T/NT TEST_OK_ PROBE READ ERASE WRITE Test report from Julia. Thanks! Corresponding to flashrom svn r409 and coreboot v2 svn r3917. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Julia Longtin <juri@solarnetone.org>
* Fix copypaste error in r3913Peter Stuge2009-01-261-1/+1
| | | | | | | Corresponding to flashrom svn r408 and coreboot v2 svn r3916. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* SST25VF040B using 0x90 identification and AAI writePeter Stuge2009-01-261-0/+14
| | | | | | | | | | | | | SST AAI is Auto Address Increment writing, a streamed write to the flash chip where the first write command sets a starting address and following commands simply append data. Unfortunately not supported by Winbond SPI masters. From July 2008. Corresponding to flashrom svn r407 and coreboot v2 svn r3913. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Add dry Am29F080B Am29LV081B SST39VF080 definitions per data sheetsPeter Stuge2009-01-251-0/+39
| | | | | | | Corresponding to flashrom svn r391 and coreboot v2 svn r3896. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* ST M50FW080 TEST_OK_ PROBE READ ERASE WRITEPeter Stuge2009-01-241-1/+1
| | | | | | | | | Report by Jody McIntyre. Thanks! Corresponding to flashrom svn r388 and coreboot v2 svn r3893. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* SST25VF080B TEST_OK_PROBEPeter Stuge2009-01-241-1/+1
| | | | | | | | | Report by Scaldov M.V. Thanks! Corresponding to flashrom svn r387 and coreboot v2 svn r3892. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Add erase and write functions to the following chip definitionsCarl-Daniel Hailfinger2009-01-081-27/+27
| | | | | | | | | | | | | AT25DF021 AT25DF041A AT25DF081 AT25DF161 AT25DF321 AT25DF321A AT25DF641 AT25F512B AT25FS010 AT25FS040 AT26DF081A AT26DF161 AT26DF161A AT26DF321 AT26F004 Straight from the data sheets, untested because I lack the hardware. Corresponding to flashrom svn r376 and coreboot v2 svn r3853. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se>
* This patch improves machine parseability and human readability of flashchips.cStephan Guilloux2009-01-081-925/+2087
| | | | | | | | | | | The explicit initialization makes sure any future struct flashchip reordering is not needed. (Except for the case where we need arrays of some of the struct members.) Corresponding to flashrom svn r374 and coreboot v2 svn r3851. Signed-off-by: Stephan Guilloux <mailto:stephan.guilloux@free.fr> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add SST49LF020 supportSven Schnelle2009-01-071-0/+6
| | | | | | | Corresponding to flashrom svn r373 and coreboot v2 svn r3850. Signed-off-by: Sven Schnelle <svens@stackframe.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add 28 flash chips of the MX29 series to the flashrom ID table and support ↵Carl-Daniel Hailfinger2008-12-101-0/+6
| | | | | | | | | | | the MX29LV040C MX29LV040C probe and read support tested by khetzal on IRC. Corresponding to flashrom svn r366 and coreboot v2 svn r3809. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Kill obsolete and misplaced commentCarl-Daniel Hailfinger2008-12-081-1/+1
| | | | | | | Corresponding to flashrom svn r365 and coreboot v2 svn r3806. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Breaks chip info into multiple linesFENG yu ning2008-12-081-160/+937
| | | | | | | Corresponding to flashrom svn r363 and coreboot v2 svn r3804. Signed-off-by: FENG yu ning <fengyuning1984@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add SST25VF080B flash chip supportJason Wang2008-11-281-0/+1
| | | | | | | | | | | This is the first chip which uses the infrastructure for alternative erase commands, namely spi_chip_erase_60_c7(). Corresponding to flashrom svn r350 and coreboot v2 svn r3776. Signed-off-by: Jason Wang <Qingpei.Wang@amd.com> Reviewed-by: Joe Bao <zheng.bao@amd.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for 32Mbit SPI flash SST25VF032BTero O Peippola2008-11-241-0/+1
| | | | | | | | | | | Tested on gigabyte m57sli. File util/flashrom/flash.h already had correct ID for that part. Corresponding to flashrom svn r347 and coreboot v2 svn r3769. Signed-off-by: Tero O Peippola <xeropp@gmail.com> Acked-by: Peter Stuge <peter@stuge.se>
* Implement read support for the following Atmel chipsCarl-Daniel Hailfinger2008-11-181-15/+15
| | | | | | | | | | | | | | | | | | | | | | | | | AT25DF021 AT25DF041A AT25DF081 AT25DF161 AT25DF321A AT25DF641 AT25F512B AT25FS010 AT25FS040 AT26DF041 AT26DF081A AT26DF161 AT26DF161A AT26DF321 AT26F004 I double-checked the data sheets and am confident this will work. Corresponding to flashrom svn r344 and coreboot v2 svn r3756. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* SST39VF020 TEST_OK_ PROBE READ ERASE WRITEMart Raudsepp2008-11-171-1/+1
| | | | | | | | | Tested fully on a ThinCan DBE61A Corresponding to flashrom svn r343 and coreboot v2 svn r3755. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee>
* The AT25 and AT26 series SPI chips from Atmel are plain EEPROMsCarl-Daniel Hailfinger2008-11-151-1/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AT45 series SPI chips are DataFlash EEPROMs which means they have odd (non-power-of-two) sector sizes, but some of the DataFlash chips can be configured or ordered with power-of-two sector sizes. Add probe support for the following Atmel SPI chips: AT25DF021 AT25DF041A AT25DF081 AT25DF161 AT25DF321A AT25DF641 AT25F512B AT25FS010 AT25FS040 AT26DF041 AT26DF081A AT26DF161 AT26DF161A AT26DF321 AT26F004 AT45CS1282 AT45DB011D AT45DB021D AT45DB041D AT45DB081D AT45DB161D AT45DB321C AT45DB321D AT45DB642D Add an explanation why the following chips can't be probed: AT45BR3214B AT45D011 AT45D021A AT45D041A AT45D081A AT45D161 AT45DB011 AT45DB011B AT45DB021A AT45DB021B AT45DB041A AT45DB081A AT45DB161 AT45DB161B AT45DB321 AT45DB321B AT45DB642 Add the ID, but no probing function for this chip: AT25F512A Corresponding to flashrom svn r342 and coreboot v2 svn r3754. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Andriy Gapon <avg@icyb.net.ua> Acked-by: Myles Watson <mylesgw@gmail.com>
* SST39SF040 TEST_OK_ PROBE READ ERASE WRITEPeter Stuge2008-11-081-1/+1
| | | | | | | | | Per report from Mario Rogen. Thanks! Corresponding to flashrom svn r341 and coreboot v2 svn r3736. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Mark ST M25P16 as fully testedCarl-Daniel Hailfinger2008-11-051-1/+1
| | | | | | | | | This has been confirmed by Stéphan Guilloux. Corresponding to flashrom svn r340 and coreboot v2 svn r3731. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for 8 new chips and fix up 2 existing chips as wellCarl-Daniel Hailfinger2008-11-041-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | Replace age-old TODO comments with real explanations. Fixed chips: Fujitsu MBM29F400TC (ID definition) Macronix MX29F002T (chip name) New chips: Fujitsu MBM29F004BC Fujitsu MBM29F004TC Fujitsu MBM29F400BC Macronix MX25L512 Macronix MX25L1005 Macronix MX25L2005 Macronix MX25L6405 Macronix MX29F002B Straight from the data sheets, compile tested only. Corresponding to flashrom svn r339 and coreboot v2 svn r3730. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for the ST M50FW002 chipCarl-Daniel Hailfinger2008-11-021-0/+1
| | | | | | | | | | | Identification only, erase/write are not implemented. Corresponding to flashrom svn r335 and coreboot v2 svn r3717. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> tested and Acked-by: Elia Yehuda <z4ziggy@gmail.com>
* Mark two more chips as fully testedUwe Hermann2008-10-301-2/+2
| | | | | | | | | | | | - SST SST39SF010A - Winbond W29C011 Tested by me on actual hardware, all operations. Corresponding to flashrom svn r334 and coreboot v2 svn r3708. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Flashrom support for some Numonyx parts (M25PE)Stefan Reinauer2008-10-291-0/+5
| | | | | | | | | Using block erase d8 as discussed with Peter Stuge Corresponding to flashrom svn r333 and coreboot v2 svn r3707. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Mark Winbond W39V040FA (512 KB) as fully supportedUwe Hermann2008-10-281-1/+1
| | | | | | | | | | Tested by Martin Stecklum <stecky@gmx.net> (both write and erase). The tests were done on an MSI MS-7065 board, so that's supported now too. Corresponding to flashrom svn r331 and coreboot v2 svn r3697. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Support for AM29F002(N)B[BT]Mats Erik Andersson2008-10-071-1/+3
| | | | | | | | | | | | | Fully tested on AM29F002NBT. Probing, reading, and erasing use the Jedec-routines, whereas writing resort to the recent write_en29f002a(), since also these chips use a byte wise algorithm. Corresponding to flashrom svn r321 and coreboot v2 svn r3639. Signed-off-by: Mats Erik Andersson <mats.andersson@gisladisker.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* This patch fixes support for the AT49F002N(T) chip in the flashrom toolTim ter Laak2008-09-301-2/+2
| | | | | | | | | | | | | | It replaces the write function to one based on write_byte_program_jedec() instead of write_page_write_jedec(), as this part does not support page programming. I have verified the NT variant to fully work now, and adjusted the test status accordingly. The N variant *should* also work with this patch, but remains untested. Corresponding to flashrom svn r320 and coreboot v2 svn r3619. Signed-off-by: Tim ter Laak <timl@scintilla.utwente.nl> Acked-by: Peter Stuge <peter@stuge.se>
* ST M29F040B status TEST_OK_ PROBE READ ERASE WRITEPeter Stuge2008-09-301-1/+1
| | | | | | | | | Per report from Daniel Lindenaar. Thanks! Corresponding to flashrom svn r319 and coreboot v2 svn r3618. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Fix typo in r3615 (TEST_PREW -> TEST_OK_PREW)Peter Stuge2008-09-291-1/+1
| | | | | | | Corresponding to flashrom svn r318 and coreboot v2 svn r3616. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
* Mark the SyncMOS S29C51002T as workingUwe Hermann2008-09-291-1/+1
| | | | | | | | | All operations tested by me on hardware. Corresponding to flashrom svn r317 and coreboot v2 svn r3615. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
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