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* Add a bunch of new/tested motherboards, board/chipset enables and flash ↵Stefan Tauner2011-06-121-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | chips etc. 3 - mark AT25DF321 as fully tested http://www.flashrom.org/pipermail/flashrom/attachments/20110527/01f1868b/attachment-0001.log - mark 82802AB as fully tested http://www.flashrom.org/pipermail/flashrom/2011-April/006145.html - mark Pm49FL002 as fully tested http://pastebin.com/pb5NTCmW - add Supermicro X8DT3 to boards_known http://www.flashrom.org/pipermail/flashrom/attachments/20110527/01f1868b/attachment-0001.log - add Supermicro X5DP8-G2 to boards_known http://www.flashrom.org/pipermail/flashrom/2011-April/006145.html - add Supermicro X8SIE as NOT WORKING to boards_known http://www.flashrom.org/pipermail/flashrom/2011-May/006554.html - add a DMI search pattern for the ASUS A8N-SLI Deluxe board enable to mitigate misdetections http://www.flashrom.org/pipermail/flashrom/2010-August/004379.html http://www.flashrom.org/pipermail/flashrom/2011-May/006570.html also, fix some random white space errors and comments/strings Corresponding to flashrom svn r1335. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* enable_flash_ich: warn if SMM BIOS Write Protection is detected in BIOS_CNTLStefan Tauner2011-06-111-1/+10
| | | | | | | Corresponding to flashrom svn r1332. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a bunch of new/tested motherboards, board/chipset enables and flash chips 2Stefan Tauner2011-06-041-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | - mark chipset enable for QS57 as OK (my thinkpad) - mark MSI G31M3-L(S) V2 (MS-7529) as OK http://www.flashrom.org/pipermail/flashrom/2011-June/006634.html - mark AT49BV512 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-June/006609.html - mark MX25L4005 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-June/006634.html - mark SST49LF020 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-May/006570.html - mark SST25VF064C as fully tested http://www.flashrom.org/pipermail/flashrom/2011-May/006586.html - mark W25x16 as fully tested http://www.flashrom.org/pipermail/flashrom/2011-June/006605.html Corresponding to flashrom svn r1324. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Whitespace, documentation and other small stuffStefan Tauner2011-05-191-2/+2
| | | | | | | | | | | | | This patch combines three previously posted patches in a revised form. one is even stolen from Stefan Reinauer (remove umlauts from man page). Corresponding to flashrom svn r1317. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Signed-off-by: Stefan Reinauer <reinauer@google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* Add support for the Via VX855 chipsetJohn Schmerge2011-05-051-0/+1
| | | | | | | Corresponding to flashrom svn r1295. Signed-off-by: John Schmerge <jbschmerge@gmail.com> for Devon IT Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
* List AMD SB850 as supported (it has the same PCI ID as SB700)Stefan Tauner2011-04-021-1/+1
| | | | | | | | | | Success report at http://flashrom.org/pipermail/flashrom/2011-March/006072.html Corresponding to flashrom svn r1285. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Fix typo in chipset_enable.cStefan Reinauer2011-03-291-1/+1
| | | | | | | Corresponding to flashrom svn r1283. Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Acked-by: Idwer Vollering <vidwer@gmail.com>
* Fix sparse warning: Using plain integer as NULL pointerPeter Huewe2011-01-241-1/+1
| | | | | | | | | | | This patch fixes the "using plain integer as NULL pointer" warnings generated by running sparse on the flashrom source. Corresponding to flashrom svn r1255. Signed-off-by: Peter Huewe <peterhuewe@gmx.de> Acked-by: Mathias Krause <mathias.krause@secunet.com> Acked-by: Stefan Reinauer <stepan@coreboot.org>
* Fix decoding of SB600 LPC ROM protection registersMathias Krause2011-01-011-6/+6
| | | | | | | | | | The address part was using a bit of the size, the size was missing the upper bit, was off by 1023 bytes and included the protection bits. Corresponding to flashrom svn r1250. Signed-off-by: Mathias Krause <mathias.krause@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Revert PCI config space writes on shutdownCarl-Daniel Hailfinger2010-11-101-45/+33
| | | | | | | | | | | | | | | This means all chipset enables etc. will be undone on shutdown. Reversible PCI config space writes now use rpci_write_*(). PCI config space writes which are one-shot (e.g. communication via config space) should continue to use the permanent pci_write_* variants. Extend the number of available register_shutdown slots to 32. Corresponding to flashrom svn r1232. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Refine text of requests to send logsPaul Menzel2010-10-081-3/+8
| | | | | | | | | | | A lot of messages sent@flashrom.org just have "flashrom -V" as the subject. Ask people to include more information in the subject line to make life easier for developers/supporters. Corresponding to flashrom svn r1202. Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Remove duplicate includes from the codeStefan Reinauer2010-10-061-1/+0
| | | | | | | Corresponding to flashrom svn r1196. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a board-enable for the ASRock K7S41, chipset-enable for SiS 741Uwe Hermann2010-10-051-0/+1
| | | | | | | | | | | | | | This also adds (and marks as tested) a chipset-enable for the SiS 741. All operations successfully tested on hardware. lspci/superiotool: http://www.flashrom.org/pipermail/flashrom/2010-September/004710.html Corresponding to flashrom svn r1192. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add chipset enable for Broadcom OSB4Joshua Roys2010-09-151-0/+18
| | | | | | | | | No docs available. Corresponding to flashrom svn r1174. Signed-off-by: Joshua Roys <roysjosh@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a board enable for MSI MS-6561 (745 Ultra)Mattias Mattsson2010-09-111-1/+1
| | | | | | | | | | | | | | | | SiS 745 chipset + Winbond W83697HF and Winbond W49F002U flash. Probe, read, erase and write all work. Matching on "NB/SB" (they are integrated). Also mark SiS 745 chipset as tested. lspci/superiotool: http://www.flashrom.org/pipermail/flashrom/2010-September/004705.html Corresponding to flashrom svn r1158. Signed-off-by: Mattias Mattsson <vitplister@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for Intel 5 Series / 3400 Series chipsetsHelge Wagner2010-08-111-0/+14
| | | | | | | | | | | (At least) for the QM57 which i have tested an additional patch was needed as some reserved bits in the "Software Sequencing Flash Control Register" (SSFC) needs to be programmed to 1 in the QM57. Corresponding to flashrom svn r1137. Signed-off-by: Helge Wagner <helge.wagner@ge.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Various cosmetic and coding-style fixesUwe Hermann2010-08-081-3/+3
| | | | | | | | | | | | | | | | | | | | | - Fix incorrect whitespace, indentation, and coding style in some places. - Drop '/**' Doxygen comments, we don't use Doxygen. Even if we would use it, the comments are useless as we don't have any Doxygen markup in there. - Use consistent vendor name spelling as per current website (NVIDIA, abit, GIGABYTE). - Use consistent / common format for "Suited for:" lines in board_enable.c. - Add some missing 'void's in functions taking no arguments. - Add missing fullstops in sentences, remove them from non-sentences (lists). Corresponding to flashrom svn r1134. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for SIS661 (SIS963)David Borg2010-07-311-0/+1
| | | | | | | | | Tested on Asus P4S800-MX. Corresponding to flashrom svn r1128. Signed-off-by: David Borg <borg.db@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add Nvidia nForce MCP61/MCP65/MCP67/MCP78S/MCP73/MCP79 SPI flashing supportCarl-Daniel Hailfinger2010-07-281-146/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Huge thanks go to Michael Karcher for reverse engineering the interface and to Johannes Sjölund for testing the first iterations of my patch on his hardware until it worked. Thanks to the following testers of the patch: * MCP61, 10de:03e0, LPC OK, ECS Geforce6100SM-M, Andrew Cleveland * MCP61, 10de:03e0, LPC OK, Biostar NF520-A2 NF61D-A2, Vitaliy Buchynskyy * MCP65, 10de:0441, SPI OK, MSI MS-7369 K9N Neo-F v2, Kjell Braden * MCP65, 10de:0441, SPI OK, MSI MS-7369, Wolfgang Schnitker * MCP65, 10de:0441, SPI OK, MSI MS-7369, Johannes Sjölund * MCP65, 10de:0441, SPI OK, MSI MS-7369, Melchior Franz * MCP78S, 10de:075c, SPI OK, Asus M3N78 PRO, Brad Rogers * MCP78S, 10de:075c, SPI OK, Asus M3N78-VM, Marcel Partap * MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Kimmo Vuorinen * MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Vikram Ambrose * MCP79, 10de:0aad, SPI OK, Acer Aspire R3600, Andrew Morgan * MCP79, 10de:0aae, LPC ??, Lenovo Ideapad S12 laptop, Christian Schmitt * MCP79, 10de:0aae, SPI OK, Apple iMac9,1 Mac-F2218EA9, David "dledson" flashrom will refuse to write/erase for safety reasons if MCP6x/MCP7x SPI is detected. Corresponding to flashrom svn r1113. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Split off programmer.h from flash.hCarl-Daniel Hailfinger2010-07-271-0/+1
| | | | | | | | | | | | | | | | | | | | | Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Corresponding to flashrom svn r1112. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Convert MMIO accesses of non-internal PCI-based programmers to be ↵Carl-Daniel Hailfinger2010-07-271-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | endian-agnostic Convert all PCI-based external programmers to use special little-endian accessors for all MMIO regions of PCI devices. This patch does _not_ touch the internal programmer (which is PCI-based as well). Huge thanks go to Misha Manulis who worked with me to create a first version of this patch for the satasii programmer based on modification of generic code. Huge thanks also go to Segher Boessenkool for suggesting the pci_mmio_ prefix for the abstraction layer. NOTE to package maintainers: With this patch, compilation and usage of flashrom should be safe on x86, x86_64, MIPS (little and big endian) and PowerPC (big endian). The internal programmer is disabled on non-x86/x86_64 (but it compiles). The atahpt, nic3com, nicnatsemi, nicrealtek and rayer_spi can not be compiled on non-x86/x86_64 because port space I/O is not (yet) supported. Please compile with default settings on x86/x86_64 and with the following settings on all other architectures: make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no CONFIG_NICNATSEMI=no CONFIG_RAYER_SPI=no Corresponding to flashrom svn r1111. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Misha Manulis <misha@manulis.com>
* Move SB600 SPI initialization to sb600spi.cMichael Karcher2010-07-221-77/+5
| | | | | | | Corresponding to flashrom svn r1099. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Move Intel SPI initialisation to ichspi.cMichael Karcher2010-07-221-200/+18
| | | | | | | | | | | Smarter version could decide whether SPI is vital or not depending on straps. Straps are currently implemented for ICH7. EP80579 is in the comment, PCH of 5 Series/3400 Series has "LPC, reserved, PCI, SPI". Corresponding to flashrom svn r1098. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Fix out-of-bounds ICH FREG permission printingCarl-Daniel Hailfinger2010-07-131-3/+4
| | | | | | | | | | | | | | A bit was masked, but not shifted, and that led to worst-case accesses of index 24 in an array with 4 members. I've improved readability in the variable declaration block as well. Thanks to Stephen Kou for reporting the bug. Corresponding to flashrom svn r1076. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stephen Kou <stephen@hyarros.com>
* Unify programmer parameter extractionCarl-Daniel Hailfinger2010-07-081-1/+1
| | | | | | | | | | | Make programmer_param static by converting all users to extract_programmer_param. Programmer parameters can no longer be separated with a colon, they have to be separated with a comma. Corresponding to flashrom svn r1072. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Various places in the flashrom source feature custom parameter extraction ↵Carl-Daniel Hailfinger2010-07-061-5/+10
| | | | | | | | | | | | | | | | | | | | from programmer_param This led to wildly differing syntax for programmer parameters, and it also voids pretty much every assumption you could make about programmer_param. The latter is a problem for libflashrom. Use extract_param everywhere, clean up related code and make it more foolproof. Add two instances of exit(1) where we have no option to return an error. Remove six instances of exit(1) where returning an error was possible. WARNING: This changes programmer parameter syntax for a few programmers! Corresponding to flashrom svn r1070. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Kill global variables, constants and functions if local scope sufficesCarl-Daniel Hailfinger2010-07-031-30/+30
| | | | | | | | | | | | | | | | | | | | | | | Constify variables where possible. Initialize programmer-related variables explicitly in programmer_init to allow running programmer_init from a clean state after programmer_shutdown. Prohibit registering programmer shutdown functions before init or after shutdown. Kill some dead code. Rename global variables with namespace-polluting names. Use a previously unused locking helper function in sst49lfxxxc.c. This is needed for libflashrom. Effects on the binary size of flashrom are minimal (300 bytes shrinkage), but the data section shrinks by 4384 bytes, and that's a good thing if flashrom is operating in constrained envionments. Corresponding to flashrom svn r1068. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* ICH9/10: display FRAP/FREGx access controlsJoshua Roys2010-07-011-15/+47
| | | | | | | Corresponding to flashrom svn r1066. Signed-off-by: Joshua Roys <roysjosh@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Kill unneeded #include wherever possibleCarl-Daniel Hailfinger2010-06-211-3/+1
| | | | | | | | | | Tested on Linux, FreeBSD, NetBSD, OpenBSD, DOS. Thanks to Jonathan A. Kollasch and Idwer Vollering for testing. Corresponding to flashrom svn r1057. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Idwer Vollering <vidwer+lists.flashrom@gmail.com>
* Fill in buses_supported for remaining Intel chipsets (ICH0-ICH5, Poulsbo)Carl-Daniel Hailfinger2010-06-201-0/+2
| | | | | | | Corresponding to flashrom svn r1055. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* VIA: disable byte mergingMichael Karcher2010-06-131-7/+52
| | | | | | | | | | | | | | | | All mentioned north bridges have been checked against data sheet. That's all north bridges google found a datasheet for with "byte merge" included. Runs multiple chipset enables if the first one requests further enables to be run. VIA byte-merging logic tested: works. multiple chipset logic: completely untested Corresponding to flashrom svn r1043. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Board-enable for MS-7025 (K8N Neo2 Platinum)Michael Karcher2010-06-121-0/+1
| | | | | | | | | | | Test report is http://www.coreboot.org/pipermail/flashrom/2010-April/002967.html Corresponding to flashrom svn r1041. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Tested-by: Valentine "Pegasus rider" Yatsenko <mr.qweo@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Remove unneeded #include statements completelyCarl-Daniel Hailfinger2010-05-301-0/+1
| | | | | | | | | | | | | | | Unistd.h was only used to get a definition of NULL in all files. Add our own NULL #define and remove unistd.h from flash.h stdio.h has no place in flash.h, it should be included only in files which really need it. Add #include statements in individual .c files where needed. Replace a few printf with msg_* to eliminate the need for stdio.h. Corresponding to flashrom svn r1021. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* ichspi: try harder to conform to address restrictionsCarl-Daniel Hailfinger2010-05-281-4/+4
| | | | | | | | | | | | | | ICH SPI can enforce address restrictions for all accesses which take an address (well, it could if the chipset implementation was not broken). Since exploiting the broken implementation is harder than conforming to the address restrictions wherever possible, conform to the address restrictions instead. This patch eliminates a lot of transaction errors people were seeing on chip probe. Corresponding to flashrom svn r1016. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Handle the following architectures in generic flashrom codeCarl-Daniel Hailfinger2010-05-261-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - x86/x86_64 (little endian) - PowerPC (big endian) - MIPS (big+little endian) No changes to programmer specific code. This means any drivers with MMIO access will _not_ suddenly start working on big endian systems, but with this patch everything is in place to fix them. Compilation should work on all architectures listed above for all drivers except nic3com and nicrealtek which require PCI Port IO which is x86-only for now. To compile without nic3com and nicrealtek, run make distclean make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no Thanks to Misha Manulis for testing early versions of this patch on PowerPC (big endian) with the satasii programmer. Thanks to Segher Boessenkool for design review and for helping out with compiler tricks and pointing out that we need eieio on PowerPC. Thanks to Vladimir Serbinenko for compile testing on MIPS (little endian) and PowerPC (big endian) and for runtime testing on MIPS (little endian). Thanks to David Daney for compile testing on MIPS (big endian). Thanks to Uwe Hermann for compile and runtime testing on x86_64. DO NOT RUN flashrom ON NON-X86 AFTER APPLYING THIS PATCH! This patch only provides the infrastructure, but does not convert any drivers, so flashrom will compile, but it won't do the right thing on non-x86 platforms. Corresponding to flashrom svn r1013. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Misha Manulis <misha@manulis.com> Acked-by: Vladimir 'phcoder/φ-coder' Serbinenko <phcoder@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Segher Boessenkool <segher@kernel.crashing.org>
* Print found PCI IDs during chipset detectionCarl-Daniel Hailfinger2010-05-221-0/+3
| | | | | | | | | | | | Add debug output of the exact matched chipset PCI ID to keep track of tested PCI IDs for chipsets with one name and multiple IDs. This will help avoid problems similar to the Tyan S2915 OEM undetected flash in the future. Corresponding to flashrom svn r1008. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Disable probing for one variant of MCP55 to enable Tyan S2915Carl-Daniel Hailfinger2010-05-221-1/+9
| | | | | | | | | | | | | | | | | | Fix Tyan S2915 OEM board by commenting out MCP55 LPC bridge PCI ID 10de:0361 which is the secondary LPC bridge. The same effect could be achieved by refusing to run enable_flash_mcp55 if the device class is not ISA bridge [0601]. Thanks to Alessandro Polverini, Joel Robertson, Nicolas Aveline, Phil LoCascio and Nils-Helge Garli Hegvik for testing flashrom on hardware and Michael Karcher for analyzing the factory BIOS for clues. In the end, no board enable was needed and it was a pure chipset issue. Corresponding to flashrom svn r1007. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Convert various prints to use msg_p* and msg_g* respectivelySean Nelson2010-05-071-108/+108
| | | | | | | | | Convert programmer print messages to msg_p* convert general print messages to msg_g* a few fixes as suggested by Carl-Daniel. Corresponding to flashrom svn r997. Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Rename identifiers called 'byte'Michael Karcher2010-02-251-14/+14
| | | | | | | | | | | | Still fallout of adding "-Wshadow". Missed the ht1000 one (chipset_enable is not compied on Windows where we had the collision with "byte" last time) and the other occurrence is newly introduced. Old libpci defines a global symbol called "byte" too. Corresponding to flashrom svn r913. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Refactor MCP SPI detectionCarl-Daniel Hailfinger2010-02-181-54/+101
| | | | | | | | | | | | - Set supported buses based on ISA bridge reg 0x8a - Use MCP55 chipset enable only if LPC is detected - Allow LPC on MCP61 - Eliminate duplicated code where possible Corresponding to flashrom svn r906. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add SPI mode diagnostics for all post-MCP55 (nForce 5) chipsets from NvidiaCarl-Daniel Hailfinger2010-02-131-1/+137
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Huge thanks to Michael Karcher for reverse engineering the MCP67 chipset and writing a spec. Due to this, we were able to use the chinese wall technique for 100% clean room reverse engineering. This patch doesn't touch any of the new registers, it only reads them. Assuming that read has no side effects, this patch is a no-op and safe. We need "flashrom -V" output from all post-MCP55 (nForce 5) chipset boards. Please indicate if your board uses SPI flash or LPC flash (if you know it). Note: That output is only helpful if it is created with patched flashrom and if is from the first run of flashrom after a cold boot (reset or Ctrl-Alt-Del is not sufficient). There is a pattern based on which we can probably detect which flash type is present on the board. Thanks to Alessandro Polverini for testing earlier iterations of this patch. Note: The MCP67 should work. I guessed that the other recent Nvidia chipsets would work in a similar way, and created a simplified do-nothing catchall chipset enable function which dumps some info and instructs the user to send more info. Corresponding to flashrom svn r902. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add Intel NM10 chipset enableDavid Hendricks2010-01-191-0/+1
| | | | | | | | | | | | | Public chipset documentation available at http://www.intel.com/Assets/PDF/datasheet/322896.pdf Tested on NM10-based customer reference board from Intel. Corresponding to flashrom svn r866. Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Don't use "byte" as identifierMichael Karcher2010-01-121-11/+11
| | | | | | | | | | Some mingw declares a global identifier "byte", causing -Werror -Wshadow to break compilation. This patch renames all identifiers called "byte". Corresponding to flashrom svn r861. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Chipset: Fix sis5x0 register write verificationLuc Verhaegen2010-01-101-13/+3
| | | | | | | | | | | Also remove separate sis 5596 routine: superio code will be handled separately, which then turns this routine into the sis 5511 chipset enable. Corresponding to flashrom svn r859. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Fix Intel FWH decode sizeMichael Karcher2010-01-031-2/+2
| | | | | | | | | Fixes wrong detection of area decoded to the FWH interfaces. Corresponding to flashrom svn r826. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add VIA VT8233A identification, mark as testedRaúl Soriano2009-12-231-0/+1
| | | | | | | Corresponding to flashrom svn r820. Signed-off-by: Raúl Soriano <GatoLoko@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Chipset/Board: vt8237: Set All mem cycles to LPC in chipset enableLuc Verhaegen2009-12-231-0/+7
| | | | | | | | | | | | | | | | | | | | | | | Only done for VT8237R (possibly needed for VT8237 too), VT8235 does not need this (even if the original bios does so: Asus A7V8X-MX SE, MSI KT4V were verified). This then opens a floodgate of cleanups in the board enables. * EPIA SP board enable vanishes, taking EPIA CN match with it. * Asus A7V8X-MX/Tyan S2498 board enable then equals w836xx_memw_enable_2e * AOpen vKM400Am-S board enable then equals it8705_rom_write_enable * Epia M board enable becomes via_vt823x_gpio15_raise * Epia N board enable becomes via_vt823x_gpio9_raise * Asus M2V-MX board enable becomes via_vt823x_gpio5_raise * vt823x_gpio_set becomes via_vt823x_gpio_set, and now detects ISA bridge itself, in concordance with intel ich and nvidia mcp gpio. Corresponding to flashrom svn r815. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Chipset: Add support for Intel Poulsbo chipsetAdam Jurkowski2009-12-211-0/+22
| | | | | | | Corresponding to flashrom svn r809. Signed-off-by: Adam Jurkowski <adam.jurkowski@kontron.pl> Acked-by: Luc Verhaegen <libv@skynet.be>
* Use the maximum decode size infrastructureCarl-Daniel Hailfinger2009-12-171-27/+96
| | | | | | | | | | | | | | | | | | - Detect max FWH size for Intel 631xESB/632xESB/3100/ICH6/ICH7/ICH8/ICH9/ICH10. - Move IDSEL override before decode size checking for the chipsets listed above or flashrom will complain based on old values. - Adjust supported flash buses for the chipsets listed above (none of them supports LPC or Parallel). - Detect max parallel size for AMD/National Semiconductor CS5530. - Adjust supported flash buses for CS5530/CS5530A. - Set board-specific max decode size for Elitegroup K7VTA3. - Set board-specific max decode size for Shuttle AK38N. Corresponding to flashrom svn r806. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Internal (onboard) programming was the only feature which could not be disabledCarl-Daniel Hailfinger2009-12-131-21/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Make various pieces of code conditional on support for internal programming. Code shared between PCI device programmers and onboard programming is now conditional as well. It is now possible to build only with dummy support: make CONFIG_INTERNAL=no CONFIG_NIC3COM=no CONFIG_SATASII=no CONFIG_DRKAISER=no CONFIG_SERPROG=no CONFIG_FT2232SPI=no This allows building for a specific use case only, and it also facilitates porting to a new architecture because it is possible to focus on highlevel code only. Note: Either internal or dummy programmer needs to be compiled in due to the current behaviour of always picking a default programmer if -p is not specified. Picking an arbitrary external programmer as default wouldn't make sense. Build and runtime tested in all 1024 possible build combinations. The only failures are by design as mentioned above. Corresponding to flashrom svn r797. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
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