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* Add --list-supported option which lists the supported ROM chips, chipsets, ↵Uwe Hermann2008-03-121-2/+12
| | | | | | | | | and mainboards Corresponding to flashrom svn r199 and coreboot v2 svn r3133. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Ward Vandewege <ward@gnu.org>
* Further cleanups to enable_flash_cs5536Mart Raudsepp2008-02-111-5/+2
| | | | | | | | | | | | | | | | - Remove the "enable write to flash" message, as the caller appears to already report that. - Move the 'modprobe msr' suggestions to the first lseek64 error handling, as we get an error there already. - Rename a perror string from "read" to "read msr", as we use the latter already in this function for another read. Corresponding to flashrom svn r195 and coreboot v2 svn r3101. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Improve error handling and make RCONF_DEFAULT_MSR address be a constantMart Raudsepp2008-02-081-26/+52
| | | | | | | | | Also, move a big code comment to the top of enable_flash_cs5536(). Corresponding to flashrom svn r193 and coreboot v2 svn r3098. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Write enable flash chips attached to CS3 of CS5536 chipsets (AMD Geode)Mart Raudsepp2008-02-081-12/+33
| | | | | | | | | | | | | | | | This implements support for devices using AMD Geode companion chip CS5536 that have the Boot ROM on NOR flash that is directly connected to FLASH_CS3 (Boot Flash Chip Select). We need to write enable it in the NORF_CTL MSR register for flashrom to be able to write to it, including JEDEC probe commands. This patch allows us to stop using AMD gx_utils.ko for BIOS flashing on the DBE61. Corresponding to flashrom svn r192 and coreboot v2 svn r3097. Signed-off-by: Mart Raudsepp <mart.raudsepp@artecdesign.ee> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Correctly disable the ROM area Write Protect bit in the Geode LXMarc Jones2008-01-261-1/+1
| | | | | | | | | | Corresponding to flashrom svn r188 and coreboot v2 svn r3078. Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Peter Stuge <peter@stuge.se> Tested on the pcengines alix1c and works fine. Acked-by: Ronald G. Minnich <rminnich@gmail.com>
* Various coding style fixes, constification, fixed typosUwe Hermann2007-12-041-82/+59
| | | | | | | | | | Also, s/0xFF80/0xFFC0/ in the Acorp 6A815EPD board-enable, as per http://www.linuxbios.org/pipermail/linuxbios/2007-December/027750.html Corresponding to flashrom svn r162 and coreboot v2 svn r2997. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Flashrom support for AMD Geode CS5536Lane Brooks2007-11-131-0/+55
| | | | | | | | | | Attached is a patch that enables AMD Geode CS5536 chipset support. I have tested it successfully on a MSM800 board from digital logic. Corresponding to flashrom svn r160 and coreboot v2 svn r2967. Signed-off-by: Lane Brooks <lbrooks@mit.edu> Acked-by: Jordan Crouse <jordan.crouse@amd.com>
* Add support for Intel 440MX and Fujitsu MBM29F400TCUwe Hermann2007-10-301-0/+1
| | | | | | | | | Detection and reading works, writing is not tested. Corresponding to flashrom svn r158 and coreboot v2 svn r2903. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se>
* Some cosmetic cleanups in the flashrom code and outputUwe Hermann2007-10-171-2/+2
| | | | | | | Corresponding to flashrom svn r151 and coreboot v2 svn r2873. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Fix wrong values/typos in chipset_enable.cCarl-Daniel Hailfinger2007-10-171-2/+2
| | | | | | | | | | This has been confirmed by Ed Swierk in http://www.mail-archive.com/linuxbios@linuxbios.org/msg09788.html . Corresponding to flashrom svn r150 and coreboot v2 svn r2868. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Revert my last cleanup patchUwe Hermann2007-10-101-1/+1
| | | | | | | Corresponding to flashrom svn r143 and coreboot v2 svn r2847. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Cosmetic changes to make the flashrom output more consistentUwe Hermann2007-10-101-1/+1
| | | | | | | Corresponding to flashrom svn r142 and coreboot v2 svn r2846. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Change out/in combinations to pci_read/write_byte in sis630 chipset enableAlex Beregszaszi2007-09-111-6/+4
| | | | | | | Corresponding to flashrom svn r138 and coreboot v2 svn r2770. Signed-off-by: Alex Beregszaszi <alex@rtfs.hu> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Change all flashrom license headers to use our standard formatUwe Hermann2007-08-291-7/+19
| | | | | | | | | No changes in content of the files. Corresponding to flashrom svn r131 and coreboot v2 svn r2751. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Cosmetic fixesUwe Hermann2007-08-231-9/+8
| | | | | | | Corresponding to flashrom svn r130 and coreboot v2 svn r2748. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Drop a bunch of useless header files, merge them into flash.hUwe Hermann2007-08-231-2/+0
| | | | | | | Corresponding to flashrom svn r128 and coreboot v2 svn r2746. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Fix up and document the AMD CS5530/CS5530A supportUwe Hermann2007-06-061-10/+21
| | | | | | | | | | | | | The previous code was pretty unreadable, undocumented and did some totally unrelated things (such as mucking with the game port or port 0x92). This version is tested with a 256 KB chip and should work for the CS5530 and CS5530A. Corresponding to flashrom svn r120 and coreboot v2 svn r2715. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Document the newly supported IBM x3455 board and the now-supported Broadcom ↵Uwe Hermann2007-06-051-4/+3
| | | | | | | | | HT-1000 chipset Corresponding to flashrom svn r119 and coreboot v2 svn r2713. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Move GPIO settings to board specific code for IBM x3455Stefan Reinauer2007-06-051-5/+0
| | | | | | | Corresponding to flashrom svn r118 and coreboot v2 svn r2712. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add support for BCM HT1000 chipsetStefan Reinauer2007-06-051-0/+24
| | | | | | | | | Tested on IBM x3455. Corresponding to flashrom svn r117 and coreboot v2 svn r2711. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Add support for ASUS P5A (Socket 7, ALi based)Luc Verhaegen2007-05-201-0/+14
| | | | | | | | | | | | | | * Add support for the ALi M1533 to chipset_enable.c * Add some SMBus poking needed for the ASUS P5A, to board_enable.c Since PCI subsystem IDs are worthless with this board, people will have to name the board directly. Corresponding to flashrom svn r109 and coreboot v2 svn r2677. Signed-off-by: Luc Verhaegen <libv@skynet.be> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Fix coding style of flashrom by running indent on all filesUwe Hermann2007-05-091-141/+134
| | | | | | | | | | | | indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch] Some minor fixups were required, and maybe a few more cosmetic changes are needed. Corresponding to flashrom svn r108 and coreboot v2 svn r2643. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for CX700 builtin southbridgeRandall Philipson2007-04-091-0/+1
| | | | | | | | Corresponding to flashrom svn r101 and coreboot v2 svn r2599. Signed-off-by: Randall Philipson <rtphilipson@cox.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de>
* Split flash_enable.c into chipset_enable.c and board_enable.cLuc Verhaegen2007-04-041-0/+469
This splits up the ROM Write enable code into chipset specific and board specific parts. This of course means that a lot of code is plainly moved about. * Allows for linuxbios name matching and pci-subsystem id matching. The latter uses a double set to properly distuinguish boards despite of some known vendors being lax about it. * Fixes GPIO15 being raised on every VT8235 southbridge, regardless of what that line actually controls; rom on EPIA-M, backlight on mitac 8999 laptop. * Adds flashrom support for Asus A7V400-MX (KM400 + VT8235) * Island aruma was renamed agami aruma, the board specific code now got adjusted. A set of pci-ids was retrieved from source code. Corresponding to flashrom svn r99 and coreboot v2 svn r2581. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Stefan Reinauer <stepan@coresystems.de>
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