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* Board enable for GA-6IEMMichael Karcher2010-10-052-0/+3
| | | | | | | | | | | | | | Reported by Konstantin <hc@comp.susu.ac.ru> lspci (superiotool missing, doesn't matter for this patch) http://www.coreboot.org/pipermail/flashrom/2010-September/004609.html DMI is needed, as there are no usefull PCI IDs. (no test of that board yet, thus marked as untested) Corresponding to flashrom svn r1187. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add details how to build for DOS to READMEIdwer Vollering2010-10-051-3/+4
| | | | | | | | | | Update README to list all the needed rpm files for DOS cross-compilation and update the download location of cwsdpmi. Corresponding to flashrom svn r1186. Signed-off-by: Idwer Vollering <vidwer+flashrom@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add Intel 82571EB and 82572EI Gigabit NICs to the supported listIdwer Vollering2010-10-051-0/+2
| | | | | | | | Corresponding to flashrom svn r1185. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Tested-by: Iain Paton <selsinork@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for building flashrom against libpayloadPatrick Georgi2010-09-306-5/+74
| | | | | | | | | | | This doesn't include changes to the frontend which must be done separately, so this won't work out of the box. This code was tested on hardware. Corresponding to flashrom svn r1184. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Support for Loongson-2F (MIPS) flashingVladimir 'phcoder' Serbinenko2010-09-292-1/+52
| | | | | | | Corresponding to flashrom svn r1183. Signed-off-by: Vladimir 'phcoder' Serbinenko <phcoder@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add list with DMI chassis typesCarl-Daniel Hailfinger2010-09-261-4/+29
| | | | | | | | | | | | | Half a dozen hardcoded strcmp() don't make sense if we need a chassis-type list anyway once we merge the internal DMI decoder. Provide and array of the most interesting chassis types and annotate them with laptop/non-laptop status. Match the dmidecode chassis type against the strings in the array. Corresponding to flashrom svn r1182. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com>
* Implement libpayload support and improve life for DOS based flashrom, tooPatrick Georgi2010-09-253-11/+18
| | | | | | | | | | | | | | Corresponding to flashrom svn r1181. Change the physmap* behaviour to use (void*)-1 as error code instead of NULL. That way, 1:1 mapped memory can be supported properly because (void*)0 is not a magic pointer anymore. (void*)-1 on the other hand is a rather unlikely memory offset, so that should be safe. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* internal: remove unused variablePeter Lemenkov2010-09-201-0/+2
| | | | | | | | | | | | | | | | | The variable 'ret' is unused when compiling on big-endian architecture. This produces an "unused variable" message, which might be treated as error if -Werror was passed to compiler. With this patch I was able to compile flashrom cleanly on ppc and ppc64: http://koji.fedoraproject.org/koji/taskinfo?taskID=2472482 http://koji.fedoraproject.org/koji/taskinfo?taskID=2472484 Corresponding to flashrom svn r1180. Signed-off-by: Peter Lemenkov <lemenkov@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add chip IDs for Alliance Semiconductor flash chipsMattias Mattsson2010-09-181-0/+12
| | | | | | | | | | | | | | | | | | | Cross-checked with UniFlash 1.40 source, chip datasheets and EZoFlash's chip database (http://www.ezoflash.com/chip_database.php). Datasheets: http://www.ezoflash.com/datasheets/flash/Alliance/AS29F002.pdf http://www.alsc.com/pdf/flash.pdf/as29f010.pdf http://www.alsc.com/pdf/flash.pdf/as29f040.pdf http://www.alsc.com/pdf/flash.pdf/as29f200.pdf http://www.ezoflash.com/datasheets/flash/Alliance/AS29LV160.pdf http://www.ezoflash.com/datasheets/flash/Alliance/AS29LV400.pdf http://www.ezoflash.com/datasheets/flash/Alliance/AS29LV800.pdf Corresponding to flashrom svn r1179. Signed-off-by: Mattias Mattsson <vitplister@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Handle Bus Pirates already in bit banging mode correctlyCarl-Daniel Hailfinger2010-09-162-2/+27
| | | | | | | | | | | | | | | | | | | | Thanks to Johannes Sjölund for reporting that the Bus Pirate init could not deal with a Bus Pirate which is already in binary Bitbang mode. This is caused by a combination of the slowness of the Bus Pirate, the slowness of USB and a fast serial port flush routine which just flushes the buffer contents and does not wait until data arrival stops. Make the Bus Pirate init more robust by running the flush command 10 times with 1.5 ms delay in between. This code development was sponsored by Mattias Mattsson. Thanks! Tested a few dozen times, should work reliably. Corresponding to flashrom svn r1178. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Mattias Mattsson <vitplister@gmail.com>
* Add board enable for Elitegroup GeForce6100SM-MMattias Mattsson2010-09-162-0/+25
| | | | | | | | | | | | | | | | Match on Memory Controller/LPC Bridge. lspci/superiotool output: http://www.coreboot.org/pipermail/flashrom/2010-September/004829.html Test report: http://www.coreboot.org/pipermail/flashrom/2010-September/004835.html Corresponding to flashrom svn r1177. Tested-by: Andrew Cleveland <evil.saltine@gmail.com> Signed-off-by: Mattias Mattsson <vitplister@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add chip definitions for the folowing chipsJoshua Roys2010-09-162-0/+84
| | | | | | | | | | | | | | | | | | | | | | | Bright BM29F040 Hyundai HY29F040A Macronix MX29F040 Also add chip IDs for Bright BM29F400T/B Datasheets: http://www.ezoflash.com/datasheets/flash/Winbond/BM29F040.pdf http://www.ezoflash.com/datasheets/flash/Hyundai/HY29F040A.pdf http://www.ezoflash.com/datasheets/flash/Macronix/MX29F040.pdf http://www.ezoflash.com/datasheets/flash/Winbond/BM29F400T_B.pdf Bright BM29F040 probe/read test report: http://www.flashrom.org/pipermail/flashrom/2010-September/004805.html Corresponding to flashrom svn r1176. Signed-off-by: Joshua Roys <roysjosh@gmail.com> Acked-by: Mattias Mattsson <vitplister@gmail.com>
* This patch changes the prefix of chip constant #defines in the following wayMattias Mattsson2010-09-153-456/+456
| | | | | | | | | | | | | | | | | | | | | | | | AM_* -> AMD_AM* AT_* -> ATMEL_AT* EN_* -> EON_EN* HY_* -> HYUNDAI_HY* MBM* -> FUJITSU_MBM* MX_ID -> MACRONIX_ID MX_* -> MACRONIX_MX* PMC_* -> PMC_PM* SST_* -> SST_SST* It leaves the Intel #defines alone because there is another pending patch for that: http://patchwork.coreboot.org/patch/1937/ Some background discussion here: http://www.flashrom.org/pipermail/flashrom/2010-July/004059.html Corresponding to flashrom svn r1175. Signed-off-by: Mattias Mattsson <vitplister@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add chipset enable for Broadcom OSB4Joshua Roys2010-09-151-0/+18
| | | | | | | | | No docs available. Corresponding to flashrom svn r1174. Signed-off-by: Joshua Roys <roysjosh@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Detect embedded EC (IMC) in AMD's SBsCarl-Daniel Hailfinger2010-09-151-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | AMD SB700 and later have an integrated microcontroller (IMC) which runs from shared flash. The IMC will happily issue reads while we write, issue writes while we read, and generally cause lots of havoc due to the concurrent accesses it performs while flashrom is running. A failing or corrupted read can be detected since r1145, and the worst case is that the read aborts and the user has to retry. A failing write is much more serious. It can be detected since r1145, but if the SPI interface locks up, we can't continue writing nor can we read the current chip contents. If the IMC is inactive, there is no reason to worry. If the IMC is active, flashrom will refuse to erase/write the chip with this patch. The correct fix would be to stop the IMC during flashing, but apparently the relevant registers are undocumented, so we take the safe route for now until someone from AMD can give us more info. Corresponding to flashrom svn r1173. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Matthias Kretz <kretz@kde.org> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Delay between probe and subsequent operationsCarl-Daniel Hailfinger2010-09-151-0/+5
| | | | | | | | | | | | | | | | | | | | | | | Some flash chips need time to exit ID mode, and while we take care of correct timing for the matching probe, subsequent probes may have totally different timing, and that can lead to garbage responses from the flash chip during the first accesses after the probe sequence is done. Delay 100 ms between the last probe and any subsequent operation. To ensure maximum correctness, we would have to reset the chip first in case the last probe function left the chip in an undefined (non-read) state. That will be possible once struct flashchip has a .reset function. This fixes unstable erase/read/write for some flahs chips on nic3com and possible other use cases as well. Thanks to Maciej Pijanka for reporting the issue and testing patches. Corresponding to flashrom svn r1172. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* SPI bitbanging: request/release busCarl-Daniel Hailfinger2010-09-154-21/+53
| | | | | | | | | | | | | | | | | | | | | | | | | SPI bitbanging on devices which speak SPI natively has a dual-use problem: We need to shut down normal SPI operations to do the bitbanging ourselves. Once we're done, it makes a lot of sense to reenable "normal" SPI operations again. Add request_bus/release_bus functions to struct bitbang_spi_master. Add a bitbang shutdown function (not used yet). Change MCP SPI and Intel NIC SPI to use the new request/release bus infrastructure. Cosmetic changes to a few error messages (80 column limit). There are multiple possible strategies for bus request/release: - Request at the start of a SPI command, release immediately afterwards. - Request at the start of a SPI multicommand, release once all commands of the multicommand are done. - Request on programmer init, release on shutdown. Each strategy has its own advantages. For now, we will stay with the first strategy which worked fine so far. Corresponding to flashrom svn r1171. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Honor ICH SPI address window for readsCarl-Daniel Hailfinger2010-09-151-1/+22
| | | | | | | | | | | | | | | | | | | | | | | | ICH SPI has the ability to restrict SPI read/write accesses to a given address range. The low end of the range is configurable by the BIOS (and by flashrom if the BIOS didn't lock down the flash interface), the high end of the range is 0xffffff (2^24-1). This patch checks for an address range restriction and uses the low end of the allowed range as base for SPI reads. A similar workaround for REMS/RES opcodes has been committed in r500. This fixes read on the Intel D945GCLF mainboard where the stock BIOS enforces a restricted address range. Please note that writes need the same fix, but for architectural reasons that fix will be merged once partial write is available. Corresponding to flashrom svn r1170. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested by David Hendricks on the Intel D945GCLF mainboard, results at http://paste.flashrom.org/view.php?id=79 Acked-by: David Hendricks <dhendrix@google.com>
* Add missing GIGABYTE GA-7DXR entry, should have been in r1166Uwe Hermann2010-09-151-0/+1
| | | | | | | Corresponding to flashrom svn r1169. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Various style/consistency fixes mainly for Winbond chipsMattias Mattsson2010-09-142-97/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename constants W_nnnn -> WINBOND_Wnnnn W_25nnn -> WINBOND_NEX_W25nnn. Kill incorrect ASD chip and vendor id. Group Winbond SPI and parallel chips separately (they have different vendor IDs). Change constant names to the "canonical" chip name for the following ids: W_29C020C (0x45) -> WINBOND_W29C020 (Same as W29C020C, W29C022 and ASD AE29F2008) W_29C040P (0x46) -> WINBOND_W29C040 ("P" is for package type [32-pin PLCC], irrelevant) W_29C011 + W_29EE011 (0xC1) -> WINBOND_W29C010 (Same as W29C010M, W29C011A, W29EE011, W29EE012, and ASD AE29F1008) List all chip variants in the .name strings in flashchips.c Have two identical entries for Winbond W29C010(M)/W29C011A/W29EE011/W29EE012 but with different probe functions in flashchips.c as sometimes (for newer revisions of these chips?) the standard jedec probe seems to work. E.g. see test report here: http://patchwork.coreboot.org/patch/1476/ Also add ids for the following Winbond chips: W25Q40 W25Q128 W19B160BB W19B160BT W19B320SB/W19L320SB W19B320ST/W19L320ST W19B322MB W19B322MT W19B323MB W19B323MT W19B324MB W19B324MT W29C512A/W29EE512 W39L010 W39L040A W39L512 W49F002/W49F002B Corresponding to flashrom svn r1168. Signed-off-by: Mattias Mattsson <vitplister@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Board-enable for the ASUS A7V333Uwe Hermann2010-09-142-2/+5
| | | | | | | | | | | | | | | The board-enable is the same as for the ASUS A7V8X, i.e., it raises GP51 on the ITE IT8703F. I verified using a multimeter that this will raise both, WE# and TBL# on the flash chip. All operations successfully tested on hardware. Also renamed board_asus_a7v8x() to it8703f_gpio51_raise(). Corresponding to flashrom svn r1167. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Joshua Roys <roysjosh@gmail.com>
* Another round of board/chip status updatesUwe Hermann2010-09-143-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mark the following boards as tested: - Intel Foxhollow (reported by Jason Shriver <J.Shriver@F5.com>) http://www.flashrom.org/pipermail/flashrom/2010-September/004768.html - Intel Greencity (reported by Jason Shriver <J.Shriver@F5.com>) http://www.flashrom.org/pipermail/flashrom/2010-September/004768.html - Tyan S2915-E (Thunder n6650W) (reported by Axel Bergerhoff <axelbergerhoff@compuserve.com>) http://www.flashrom.org/pipermail/flashrom/2010-August/004560.html - ASUS Z8NA-D6C (reported by John Wells <jb@sourceillustrated.com>) http://www.flashrom.org/pipermail/flashrom/2010-September/004737.html - GIGABYTE GA-7DXR (reported by Uwe Hermann <uwe@hermann-uwe.de>) http://www.flashrom.org/pipermail/flashrom/2010-September/004712.html - MSI MS-7211 (PM8M3-V) (reported by Shahar Or <mightyiampresence@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2010-September/004612.html - MSI MS-6787 (P4MAM-V/P4MAM-L) (reported by Swift Geek <swiftgeek@gmail.com>) Board-enable now marked as tested. http://www.flashrom.org/pipermail/flashrom/2010-September/004687.html Chips: - SST SST25VF016B (reported by Warren Turkal <wt@penguintechs.org>) http://www.flashrom.org/pipermail/flashrom/2010-September/004716.html Corresponding to flashrom svn r1166. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for ST M25PX32 and M25PX64 flash chipsJason Shriver2010-09-142-0/+60
| | | | | | | | | Probe, read, erase and write have been tested and all are functional. Corresponding to flashrom svn r1165. Signed-off-by: Jason Shriver <j.shriver@f5.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Use caching for Nvidia MCP SPI GPIO accessesCarl-Daniel Hailfinger2010-09-141-35/+25
| | | | | | | | | | | | Reduce clock delay to zero. Tests show more than 2x speedup. Corresponding to flashrom svn r1164. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Andrew Morgan <ziltro@ziltro.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for the abit BM6 boardTim ter Laak2010-09-132-0/+11
| | | | | | | | Corresponding to flashrom svn r1163. Signed-off-by: Tim ter Laak <timl@scintilla.utwente.nl> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for the Macronix MX251635E chipStephan Guilloux2010-09-132-0/+34
| | | | | | | Corresponding to flashrom svn r1162. Signed-off-by: Stephan Guilloux <stephan.guilloux@free.fr> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add board enable for ASUS P4SC-EMattias Mattsson2010-09-132-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | | | | | I does this by setting bits 3..2 of register 0x24 on the ITE IT8707F, while keeping bit 3 of register 0x23 set while manipulating the first register. AFAIK, there is no public datasheet available for this super i/o chip, but the above is how the vendor BIOS does it. Also, registers 0x23 and 0x24 seem to have the same meaning as on the ITE IT8710F. Matching on NB/SB. Tested on a P4SC-E with SST 39SF020A flash. Probe, read, erase, write all work. lspci/superio output: http://www.flashrom.org/pipermail/flashrom/2010-July/004090.html flashrom output: http://www.flashrom.org/pipermail/flashrom/2010-August/004566.html Many thanks to Reinder de Haan for help with reverse engineering this! Corresponding to flashrom svn r1161. Signed-off-by: Mattias Mattsson <vitplister@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Board enable for MS-6163 Pro (MS-6163 rev:2)Mattias Mattsson2010-09-132-0/+11
| | | | | | | | | | | | | | | | | | | Matching on NB/SB. Probe, read, erase and write all work. lspci/superiotool output: http://www.flashrom.org/pipermail/flashrom/2010-August/004461.html I believe that this board enable also works for MSI BX Master (MS-6163 rev:3) and perhaps also for MSI MS-6163FC (MS-6163 rev:1) but these boards have not been tested. Test logs for MS-6163 (rev:2): http://www.flashrom.org/pipermail/flashrom/2010-September/004704.html Corresponding to flashrom svn r1160. Signed-off-by: Mattias Mattsson <vitplister@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Board enable for ASUS P5GDC DeluxeJoshua Roys2010-09-132-0/+3
| | | | | | | | | | | | Match on SMBus and Audio. lspci/superiotool/flashrom output: http://www.flashrom.org/pipermail/flashrom/2010-September/004689.html Corresponding to flashrom svn r1159. Signed-off-by: Joshua Roys <roysjosh@gmail.com> Tested-by: Alexander Mikhnovets <alexander.mikhnovets@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add a board enable for MSI MS-6561 (745 Ultra)Mattias Mattsson2010-09-113-1/+4
| | | | | | | | | | | | | | | | SiS 745 chipset + Winbond W83697HF and Winbond W49F002U flash. Probe, read, erase and write all work. Matching on "NB/SB" (they are integrated). Also mark SiS 745 chipset as tested. lspci/superiotool: http://www.flashrom.org/pipermail/flashrom/2010-September/004705.html Corresponding to flashrom svn r1158. Signed-off-by: Mattias Mattsson <vitplister@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Board enable for P4P800Michael Karcher2010-09-102-0/+3
| | | | | | | | | | | | | | | | | | | | | lspci/superiotool: http://www.coreboot.org/pipermail/flashrom/2010-August/004436.html This goes the safe route of adding a match for the P4P800 that does not match the P4P800-E Deluxe which is already in. It seems quite likely that the whole P4P800 family could use the same board enable with one generic board enable match, though. This match uses host bridge + audio, because all other IDs match the P4P800-E Deluxe board, as reported in http://www.e-monkeys.de/Everest-Bericht.txt (no user feedback, commit as "untested") Corresponding to flashrom svn r1157. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Board enable for ASUS P5GD1 ProMichael Karcher2010-09-102-0/+3
| | | | | | | | | | | | | lspci/superiotool: http://www.coreboot.org/pipermail/flashrom/2010-August/004539.html matching SMBus + Audio, because SMBus is the only core device with usable IDs. Corresponding to flashrom svn r1156. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add a board-enable for the MSI MS-6787 (P4MAM-V/P4MAM-L)Sergey A Lichack2010-09-072-0/+3
| | | | | | | | | | Marked as untested for now, as there was no response from the user. Corresponding to flashrom svn r1155. Signed-off-by: Sergey A Lichack <shadowpilot34@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add board-enable for the GIGABYTE GA-K8N51GMF-9Joshua Roys2010-09-072-0/+11
| | | | | | | | | | | | | | | Interestingly enough, this board's enable looked more like enable_flash_nvidia_nforce2 than enable_flash_ck804; it whacked 0x92, not 0x88. But according to the lspci, 0x92 is already 0. Tested successfully on hardware: http://www.flashrom.org/pipermail/flashrom/2010-August/004568.html http://www.flashrom.org/pipermail/flashrom/2010-September/004575.html Corresponding to flashrom svn r1154. Signed-off-by: Joshua Roys <roysjosh@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Updates to the board and chips status tablesUwe Hermann2010-09-053-44/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mark the following boards as tested: - Tyan S2933 (Thunder n3600S) (reported by Pendic Peter <nigma@bluewin.ch>) http://www.flashrom.org/pipermail/flashrom/2010-August/004375.html - MSI MS-7642 (890GXM-G65) (reported by Alan McMahon <pam@aldersgate.co.uk>) http://www.flashrom.org/pipermail/flashrom/2010-August/004393.html - Shuttle X50/X50(B) (reported by Ed Driesen <ed@omts.be>) http://www.flashrom.org/pipermail/flashrom/2010-August/004472.html (the "B" variant is just black instead of white, no hardware differences as far as I can see) - ASUS M2NPV-VM (reported by Antti Palosaari <crope@iki.fi>) http://www.flashrom.org/pipermail/flashrom/2010-August/004476.html - ZOTAC ZBOX HD-ID11 (reported by s. ewgen <sewgen@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2010-August/004512.html - ASRock A330GC (reported by Daniel Flinkmann <DFlinkmann@gmx.de>) http://www.flashrom.org/pipermail/flashrom/2010-August/004517.html - Congatec conga-X852 (reported by Mario Rogen <Mario.Rogen@sie.at>) http://www.coreboot.org/pipermail/coreboot/2008-November/041433.html - IEI PICOe-9452 (reported by Mario Rogen <Mario.Rogen@sie.at>) http://www.coreboot.org/pipermail/coreboot/2008-November/041433.html - Lex CV700A (reported by Mario Rogen <Mario.Rogen@sie.at>) http://www.coreboot.org/pipermail/coreboot/2008-November/041433.html - Portwell PEB-4700VLA (reported by Mario Rogen <Mario.Rogen@sie.at>) http://www.coreboot.org/pipermail/coreboot/2008-November/041433.html Mark the following chips as tested: - SST SST39SF040 (reported by Mattias Mattsson <vitplister@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2010-August/004414.html - Eon EN25F80 (reported by Ed Driesen <ed@omts.be>) http://www.flashrom.org/pipermail/flashrom/2010-August/004472.html - SyncMOS/MoselVitelic {F,S,V}29C51002T (reported by Mattias Mattsson <vitplister@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2010-August/004475.html - PMC Pm29F002T (reported by Tadas S <mrtadis@gmail.com>) http://www.flashrom.org/pipermail/flashrom/2010-September/004583.html Also: - Fix a few whitespace issues and cosmetics while I'm at it. - Add the board name (in addition to the Sxxxx number) to all Tyan boards. Corresponding to flashrom svn r1153. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Various status updatesCarl-Daniel Hailfinger2010-09-043-27/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Success report for Atmel AT26DF081A from Oliver Schnatz <oliver.schnatz@mysys.de> http://www.flashrom.org/pipermail/flashrom/2009-October/000760.html. Success report for Winbond W25Q32 from David Hendricks <dhendrix@google.com> http://www.flashrom.org/pipermail/flashrom/2010-April/002891.html Success report for SST SST39VF512 from Alec Wright <alecjw@member.fsf.org> http://www.flashrom.org/pipermail/flashrom/2010-August/004549.html http://www.flashrom.org/pipermail/flashrom/2010-August/004548.html Success report for Silicon Image SiI 3512 and AMD Am29LV040B from Michael Manulis <michael@manulis.com> http://www.flashrom.org/pipermail/flashrom/2010-July/003944.html Annotate listing with reporter/owner name for boards marked broken, flag boards for which no reports exist. - Abit IS-10 - ASRock K7VT4A+ - ASUS MEW-AM - ASUS MEW-VM - ASUS P3B-F - ASUS P5BV-M - Biostar M6TBA - Boser HS-6637 - DFI 855GME-MGF - FIC VA-502 - MSI MS-6178 - MSI MS-7260 - Soyo SY-5VD - Sun Fire x4150 - Sun Fire x4200 - Sun Fire x4540 - Sun Fire x4600 Remove comments which are no longer appropriate: - ASRock K8S8X Corresponding to flashrom svn r1152. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add Intel Gigabit NIC SPI flashing supportIdwer Vollering2010-09-038-4/+263
| | | | | | | | | | | | | | | | | | | | Tested on a 82541PI (0x8086, 0x107c) using 32-bit hardware. The last line in nicintel_request_spibus() could be changed so that FL_BUSY is used instead. Shortened sample log: [...] Found "Intel 82541PI Gigabit Ethernet Controller" (8086:107c, BDF 01:03.0). Found chip "ST M25P10.RES" (128 KB, SPI) at physical address 0xfffe0000. Multiple flash chips were detected: M25P05.RES M25P10.RES Please specify which chip to use with the -c <chipname> option. [...] Corresponding to flashrom svn r1151. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add FEATURE_WRSR_WREN to all Macronix SPI flash chipsDavid Hendricks2010-09-031-0/+11
| | | | | | | | | | Add FEATURE_WRSR_WREN to feature_bits for all Macronix SPI flash chips to indicate that spi_write_status_register() needs WREN instead of EWSR. Corresponding to flashrom svn r1150. Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add FEATURE_WRSR_WREN to all AMIC SPI flash chipsDavid Hendricks2010-09-031-0/+8
| | | | | | | | | | Add FEATURE_WRSR_WREN to feature_bits for some AMIC SPI flash chips to indicate that spi_write_status_register() needs WREN instead of EWSR. Corresponding to flashrom svn r1149. Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add FEATURE_WRSR_WREN to all Eon SPI flash chipsDavid Hendricks2010-09-031-0/+8
| | | | | | | | | | Add FEATURE_WRSR_WREN to feature_bits for many Eon SPI flash chips to indicate that spi_write_status_register() needs WREN instead of EWSR. Corresponding to flashrom svn r1148. Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add FEATURE_WRSR_WREN to all Winbond SPI flash chipsDavid Hendricks2010-09-031-0/+11
| | | | | | | | | | Add FEATURE_WRSR_WREN to feature_bits for all Winbond SPI flash chips to indicate that spi_write_status_register() needs WREN instead of EWSR. Corresponding to flashrom svn r1147. Signed-off-by: David Hendricks <dhendrix@google.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add board enable for Asus P2B-NMattias Mattsson2010-09-012-0/+11
| | | | | | | | | | | | Many thanks to Michael Karcher for reverse engineering this. lspci/superio output: http://www.flashrom.org/pipermail/flashrom/2010-August/004475.html Corresponding to flashrom svn r1146. Signed-off-by: Mattias Mattsson <vitplister@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add paranoid checks to sb600spi driverCarl-Daniel Hailfinger2010-08-182-7/+75
| | | | | | | | | | | | | | | | | | | | | Add paranoid checks for correct values in essential registers in the SB600/SB700/... SPI driver. If something else changes the values we wrote, we will see severe read/write corruption. sb600spi will now abort the access and return an error if it detects this sort of corruption. Note: This corruption can be caused by a few different events: - IPMI/BMC/IMC accesses flash - Other software accesses flash The nature of flash access (read/write/ID/...) is irrelevant. Each such access will cause corruption for all other accesses happening at the same time. Thanks to Matthias Kretz for testing this patch. Corresponding to flashrom svn r1145. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Matthias Kretz <kretz@kde.org>
* SST49FL040B: add unlockingJoshua Roys2010-08-161-2/+3
| | | | | | | | | | | | | | The datasheet says there's a set of registers in the 4Mbit before the flash memory. The block locking registers are aligned on 64K boundaries, plus 2. Write/erase sucessful on a system it failed before: http://www.flashrom.org/pipermail/flashrom/2010-August/004432.html Corresponding to flashrom svn r1144. Signed-off-by: Joshua Roys <roysjosh@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Add board enable for Abit VA6Mattias Mattsson2010-08-152-0/+3
| | | | | | | | | | lspci/superiotool: http://www.coreboot.org/pipermail/flashrom/2010-August/004440.html Corresponding to flashrom svn r1143. Signed-off-by: Mattias Mattsson <vitplister@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Check availability of GPO lines on Intel PIIX4Mattias Mattsson2010-08-151-30/+43
| | | | | | | | | | | | | | | | | | | | | | | | This patch changes the intel_piix4_gpo_set() function to always check the GENCFG and XBCS registers for the availability of the requested GPO line before raising/lowering it and fails otherwise. It makes no attempt to bypass the values in these configuration registers. The old flashrom code did consider it safe to reprogram (multiplexed) GPO:s 22-26 without checking the value of the controlling register (GENCFG). I do not really know why. I have tested this patch on an Asus P2B-N (needs GPO18 low) and MSI MS-6163 Pro (needs GPO14 high). The information for these registers are from the Intel "82371AB PCI-TO-ISA / IDE XCELERATOR (PIIX4)" datasheet available here: http://www.intel.com/design/intarch/datashts/29056201.pdf Corresponding to flashrom svn r1142. Signed-off-by: Mattias Mattsson <vitplister@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Various board status updates and fixesUwe Hermann2010-08-152-14/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - There are number of boards that have board-enables in board-enable.c but have no corresponding entry in print.c (with or without URL doesn't matter) and thus appear neither in the "flashrom -L" list of boards nor in the wiki output. Fix this by adding entries for them in print.c. - abit AN-M2 - abit KN8 Ultra - ASUS A8Jm (laptop) - ASUS A8N (might need changing to "A8N-SLI Deluxe", see http://www.coreboot.org/pipermail/flashrom/2009-November/000878.html) - ASUS A8N-LA (Nagami-GL8E) - ASUS P4B533-E - ASUS P4S800-MX - HP ProLiant DL165 G6 - IBASE MB899 - Intel SE440BX-2 (marked as non-working for now though, due to http://www.coreboot.org/pipermail/flashrom/2010-July/003952.html) - MSI MS-6577 (Xenon) - MSI MS-7207 (K8NGM2-L) - Fix / amend a few board names: - Add "ProLiant" name to the "DL145 G3" (and the new "DL165 G6"), we use such "series" names for various other boards (e.g. "Vectra" etc) and it also helps users googling for those names. - HP "Vectra VL400 PC" should be "Vectra VL400" really, I'm pretty sure the "PC" is not part of the board name but simply stands for "personal computer". Same for "Vectra VL420 SFF PC". - Change "ASUS A8JM" to "ASUS A8Jm" as per vendor website. - Add comments for boards which may be listed with incorrect names, I sent out clarification requests to the list, URLs listed as comment. - Add "Xenon" HP name to the "MSI MS-6577" OEM board. - Fix typo in "MS-7207 (K8N GM2-L)", should be "MS-7207 (K8NGM2-L)" as per vendor website. Corresponding to flashrom svn r1141. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Mark the board-enable for ASUS A8N-LA (HP OEM "Nagami-GL8E") as testedSean Nelson2010-08-151-2/+2
| | | | | | | | | | | | | | Change the DMI string to only match this exact board (DMI "NAGAMI2L") as only this one is tested. Similar HP OEM boards might also work using this board-enable but that's not sure and not tested. Two of those boards have DMI strings "NAGAMI" and "NAGAMI2". Corresponding to flashrom svn r1140. Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Board enable for MSI MS-7061 (KM4AM-V)Mattias Mattsson2010-08-152-0/+3
| | | | | | | | | | | | lspci/superiotool: http://www.coreboot.org/pipermail/flashrom/2010-August/004414.html (URL added by Michael Karcher) Corresponding to flashrom svn r1139. Signed-off-by: Mattias Mattsson <vitplister@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Board enable for GA-8PE667 Ultra 2Michael Karcher2010-08-132-0/+3
| | | | | | | | | | | | | | I had to use the USB controller in the board enable because all other subsystem IDs are having vendor: Gigabyte but mostly copy the Intel product IDs. lspci/superiotool: http://www.coreboot.org/pipermail/flashrom/2010-August/004420.html Corresponding to flashrom svn r1138. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Thomas Kalka <thomas.kalka@googlemail.com>
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