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* Speed up Bus Pirate by exploiting the FTDI FIFOCarl-Daniel Hailfinger2010-07-291-20/+22
| | | | | | | | | | | | | | | | | If we violate the raw SPI communication protocol requirements of the Bus Pirate (namely, waiting for the completion of one command before sending the next one), we can reduce the number of round trips by a factor of 3. The FT2232 chip present in the Bus Pirate has a big enough buffer (at least 128 bytes IIRC) to avoid overflows in the tiny buffer of the Bus Pirate PIC. Thanks to Daniel Flinkmann for sponsoring development of this patch. Corresponding to flashrom svn r1120. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Daniel Flinkmann <DFlinkmann@gmx.de> Acked-by: Daniel Flinkmann <dflinkmann@gmx.de>
* Add support for the Amontec JTAGkey2Jörg Fischer2010-07-294-23/+106
| | | | | | | | | | | | | | | | | | | | | | Add support for the Amontec JTAGkey2, see http://www.amontec.com/jtagkey2.shtml http://www.amontec.com/jtagkey.shtml. This FTDI 2232H variant has an additional output enable, which will be set to its "on" (L) when CS is pulled low. But it lacks a power supply and you need an external 3.3V source. The attached patch adds "jtagkey" as "type" parameter for ft2232_spi. It should work with all JTAGkeys (JTAGkey, JTAGkey-tiny and JTAGkey2) but I only have a JTAGkey2 here for testing. Add all FT2232H/FT4232H based programmers to the list printed with flashrom -L Corresponding to flashrom svn r1119. Signed-off-by: Jörg Fischer <turboj@gmx.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for various AMIC A25L* chipsDan Lenski2010-07-292-0/+252
| | | | | | | | | | Add support for AMIC A25L512, A25L010, A25L020, A25L040, A25L080, A25L016, A25L032 AMIC A25LQ032 (quad-rate read). Corresponding to flashrom svn r1118. Signed-off-by: Dan Lenski <dlenski@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Compile gfxnvidia by default, but disallow write/eraseCarl-Daniel Hailfinger2010-07-292-2/+5
| | | | | | | Corresponding to flashrom svn r1117. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Allow compilation on architectures without direct hardware access primitivesCarl-Daniel Hailfinger2010-07-291-0/+2
| | | | | | | | | | | Allow compilation on all architectures even if direct hardware access primitives are missing, if all you need is userspace access to the serial port (serprog, buspirate) or no access at all (dummy). Corresponding to flashrom svn r1116. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add detailed status register printing and unlocking for all ATMEL AT25* chipsCarl-Daniel Hailfinger2010-07-297-29/+442
| | | | | | | | | | | | | | Add support for Atmel AT25DF081A and AT25DQ161. Some chips require EWSR before WRSR, others require WREN before WRSR, and some support both variants. Add feature_bits to select the correct SPI command, and default to EWSR. Corresponding to flashrom svn r1115. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Steven Rosario Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* CosmeticsCarl-Daniel Hailfinger2010-07-281-480/+480
| | | | | | | | | | Fix alphabetic sort order for manufacturers in flashchips.c. Rename a few EON chips to Eon. Corresponding to flashrom svn r1114. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add Nvidia nForce MCP61/MCP65/MCP67/MCP78S/MCP73/MCP79 SPI flashing supportCarl-Daniel Hailfinger2010-07-285-147/+257
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Huge thanks go to Michael Karcher for reverse engineering the interface and to Johannes Sjölund for testing the first iterations of my patch on his hardware until it worked. Thanks to the following testers of the patch: * MCP61, 10de:03e0, LPC OK, ECS Geforce6100SM-M, Andrew Cleveland * MCP61, 10de:03e0, LPC OK, Biostar NF520-A2 NF61D-A2, Vitaliy Buchynskyy * MCP65, 10de:0441, SPI OK, MSI MS-7369 K9N Neo-F v2, Kjell Braden * MCP65, 10de:0441, SPI OK, MSI MS-7369, Wolfgang Schnitker * MCP65, 10de:0441, SPI OK, MSI MS-7369, Johannes Sjölund * MCP65, 10de:0441, SPI OK, MSI MS-7369, Melchior Franz * MCP78S, 10de:075c, SPI OK, Asus M3N78 PRO, Brad Rogers * MCP78S, 10de:075c, SPI OK, Asus M3N78-VM, Marcel Partap * MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Kimmo Vuorinen * MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Vikram Ambrose * MCP79, 10de:0aad, SPI OK, Acer Aspire R3600, Andrew Morgan * MCP79, 10de:0aae, LPC ??, Lenovo Ideapad S12 laptop, Christian Schmitt * MCP79, 10de:0aae, SPI OK, Apple iMac9,1 Mac-F2218EA9, David "dledson" flashrom will refuse to write/erase for safety reasons if MCP6x/MCP7x SPI is detected. Corresponding to flashrom svn r1113. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Split off programmer.h from flash.hCarl-Daniel Hailfinger2010-07-2735-527/+593
| | | | | | | | | | | | | | | | | | | | | Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Corresponding to flashrom svn r1112. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Convert MMIO accesses of non-internal PCI-based programmers to be ↵Carl-Daniel Hailfinger2010-07-275-16/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | endian-agnostic Convert all PCI-based external programmers to use special little-endian accessors for all MMIO regions of PCI devices. This patch does _not_ touch the internal programmer (which is PCI-based as well). Huge thanks go to Misha Manulis who worked with me to create a first version of this patch for the satasii programmer based on modification of generic code. Huge thanks also go to Segher Boessenkool for suggesting the pci_mmio_ prefix for the abstraction layer. NOTE to package maintainers: With this patch, compilation and usage of flashrom should be safe on x86, x86_64, MIPS (little and big endian) and PowerPC (big endian). The internal programmer is disabled on non-x86/x86_64 (but it compiles). The atahpt, nic3com, nicnatsemi, nicrealtek and rayer_spi can not be compiled on non-x86/x86_64 because port space I/O is not (yet) supported. Please compile with default settings on x86/x86_64 and with the following settings on all other architectures: make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no CONFIG_NICNATSEMI=no CONFIG_RAYER_SPI=no Corresponding to flashrom svn r1111. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Misha Manulis <misha@manulis.com>
* Add a udev rules file for flashromUwe Hermann2010-07-271-0/+55
| | | | | | | | | | | | | | | | | | | | | | | This allows USB-based external programmers to be used by non-root users (which are in the 'plugdev' group). The file is to be installed by the distros into the proper place (not sure if this is distro-specific). On Debian the file will end up in /etc/udev/rules.d/z60_flashrom.rules. On some systems the 'plugdev' group might have to adapted to whatever the respective distro uses. The following devices are listed so far: - Amontec JTAGkey(2) - Buspirate - Dediprog SF100 - DLP Design DLP-USB1232H - FTDI FT4232H Mini-Module Corresponding to flashrom svn r1110. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Board enable for abit NF-M2 nViewMichael Karcher2010-07-242-0/+10
| | | | | | | | | | | | | | | | To be safe, the onboard video of the nView edition of this board has been included in the match. If other NF-M2 editions have the same board enable, the match should be broadened lspci/superiotool http://www.coreboot.org/pipermail/flashrom/2010-April/002909.html No success report, thus committed as untested. Corresponding to flashrom svn r1109. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Detect IP35 by the SMBus bridge instead of the SATA controllerMichael Karcher2010-07-241-1/+1
| | | | | | | | | | | | | | | | | The SATA controller matched in the board enable is not always present with that ID (that's the 2-port ICH9 SATA IDE controller), but (depending on board revision/edition or BIOS settings an ICH9 SATA RAID controller appears instead. This patches matches on the SMBus function in the south bridge instead of the SATA controller. Non-working board reported by: Gunter Keilholz <gunter.keilholz@googlemail.com> lspci/superiotool: http://www.coreboot.org/pipermail/flashrom/2010-June/003591.html Corresponding to flashrom svn r1108. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Board enable for Samsung Polaris 32Michael Karcher2010-07-242-0/+3
| | | | | | | | | | | lspci/superiotool: http://www.coreboot.org/pipermail/flashrom/2010-July/003889.html Corresponding to flashrom svn r1107. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Tested-by: Alex Loktionoff <oxy-loktionoff@mail.ru> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Board enable for GA-8IRMLMichael Karcher2010-07-242-0/+10
| | | | | | | | | | | | Non-working board reported by idlogin / Putlinuxonit <putlinuxonit@gmail.com> lspci/superiotool: http://www.coreboot.org/pipermail/flashrom/2010-May/003330.html No success report, so committed as untested. Corresponding to flashrom svn r1106. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Board enable for Abit IC7Michael Karcher2010-07-242-0/+2
| | | | | | | | | | | | | Non-working board reported by: Anders Jenbo <anders@jenbo.dk> lspci/superiotool: http://www.coreboot.org/pipermail/flashrom/2010-June/003346.html no success report, so committed as untested. Corresponding to flashrom svn r1105. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Fix compilation for CONFIG_INTERNAL=noMichael Karcher2010-07-241-0/+6
| | | | | | | | | Broken by r1098 Corresponding to flashrom svn r1104. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Fix compilation which was broken by r1101Idwer Vollering2010-07-241-1/+1
| | | | | | | Corresponding to flashrom svn r1103. Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Board enable for HP Puffer2-UL8EMichael Karcher2010-07-242-0/+10
| | | | | | | | | | lspci/superiotool: http://www.coreboot.org/pipermail/flashrom/2010-July/003869.html Corresponding to flashrom svn r1102. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Mattias Mattsson <vitplister@gmail.com>
* Board enable for ASUS P4SD-LA (HP OEM)Michael Karcher2010-07-242-0/+10
| | | | | | | | | No response from reporter - committed as "untested". Corresponding to flashrom svn r1101. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Board enable for ASUS P5PE-VMMichael Karcher2010-07-242-0/+3
| | | | | | | | Corresponding to flashrom svn r1100. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Tested-by: František Kučera <linux@frantovo.cz> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Move SB600 SPI initialization to sb600spi.cMichael Karcher2010-07-223-79/+89
| | | | | | | Corresponding to flashrom svn r1099. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Move Intel SPI initialisation to ichspi.cMichael Karcher2010-07-223-206/+234
| | | | | | | | | | | Smarter version could decide whether SPI is vital or not depending on straps. Straps are currently implemented for ICH7. EP80579 is in the comment, PCH of 5 Series/3400 Series has "LPC, reserved, PCI, SPI". Corresponding to flashrom svn r1098. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for the Intel 28F002BC-TJoshua Roys2010-07-222-0/+28
| | | | | | | Corresponding to flashrom svn r1097. Signed-off-by: Joshua Roys <roysjosh@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for the following AMIC SPI chipsDaniel Lenski2010-07-223-6/+309
| | | | | | | | | | | | | | | | | | | | | | | | | | http://www.amictechnology.com/pdf/A25L20P.pdf covers: AMIC A25L05PT AMIC A25L05PU AMIC A25L10PT AMIC A25L10PU AMIC A25L20PT AMIC A25L20PU http://www.amictechnology.com/pdf/A25L16P.pdf covers: AMIC A25L16PT AMIC A25L16PU Clarify the situation surrounding the A25L40PT and A25L40PU chips which share the same RDID values, despite the fact that their erase block layouts are different. Rudolf Marek tested and confirmed the distinct erase block layouts of these chips. Add a pretty-printer for the AMIC SPI chip status register Add a generic AMIC chip type. Corresponding to flashrom svn r1096. Signed-off-by: Daniel Lenski <dlenski@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add nicnatsemi to print.c and print_wiki.cAndrew Morgan2010-07-213-3/+17
| | | | | | | | | | Change the nicnatsemi address mask to use MA0-MA16 and set the maximum decode size to 128KB. Corresponding to flashrom svn r1095. Signed-off-by: Andrew Morgan <ziltro@ziltro.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for the SST25VF064C SPI flash chipEd Swierk2010-07-212-0/+36
| | | | | | | Corresponding to flashrom svn r1094. Signed-off-by: Ed Swierk <eswierk@aristanetworks.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Add support for RayeR SPIPGM hardware as described in ↵Carl-Daniel Hailfinger2010-07-216-2/+193
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://rayer.ic.cz/elektro/spipgm.htm To use the RayeR driver, run flashrom -p rayer_spi -V Known bugs/limitations: - Won't compile/work on non-x86 architectures. - Will always use direct port I/O access. Log follows: flashrom v0.9.2-r1039 on MS-DOS 7 (i686), built with libpci 3.1.5, GCC 4.3.2, little endian Calibrating delay loop... OK. Initializing rayer_bitbang_spi programmer Using port 0x378 as I/O base for parallel port access. ... Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2015 ... Found chip "Macronix MX25L1605" (2048 KB, SPI) at physical address 0xffe00000. ... No operations were specified. Corresponding to flashrom svn r1093. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Martin Rehak <rayer@seznam.cz> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Check during SPI bitbang init that SPI bitbang master configuration is correctCarl-Daniel Hailfinger2010-07-182-1/+11
| | | | | | | Corresponding to flashrom svn r1092. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Use struct pointer instead of enum to set bitbang adapterMichael Karcher2010-07-173-28/+12
| | | | | | | Corresponding to flashrom svn r1091. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Print supported flash chips as narrow as possibleCarl-Daniel Hailfinger2010-07-171-26/+35
| | | | | | | | | | | | Fix a bug where 4 GB of spaces would be printed per line if a vendor name was longer than 10 chars. This patch is needed to commit MoselVitelic chip support. Corresponding to flashrom svn r1090. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Refine PCI BAR masks handling for drkaiser and gfxnvidiaCarl-Daniel Hailfinger2010-07-172-9/+14
| | | | | | | | | | | | | | Use the BAR value returned by pcidev_init which automatically applies the correct BAR mask for the drkaiser driver. Truncate flash chip addresses to fit into the 128 kB memory window for drkaiser and pick the same window size for gfxnvidia. Uwe tested all operations successfully on a Dr. Kaiser card. Corresponding to flashrom svn r1089. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add support for pciutils/libpci older than 2.2Carl-Daniel Hailfinger2010-07-171-0/+8
| | | | | | | | | | Needed on the original Xbox running Xebian and a few other ancient systems. Corresponding to flashrom svn r1088. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Alec Wright <alecjw@member.fsf.org>
* Use __clang_version__ macroCarl-Daniel Hailfinger2010-07-172-2/+6
| | | | | | | | | | | | | | Newer llvm/clang versions (since r102686) have a __clang_version__ macro which can be used to print the exact clang version. Fix a case where chip_to_probe was referenced twice via extern, once at the function level and once in a global include file. Found by latest clang. Corresponding to flashrom svn r1087. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Add Winbond W49F020 supportCarl-Daniel Hailfinger2010-07-171-0/+23
| | | | | | | | | This chip is used on some Xbox versions. Corresponding to flashrom svn r1086. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Alec Wright <alecjw@member.fsf.org>
* Refine SPI bitbangingCarl-Daniel Hailfinger2010-07-173-16/+25
| | | | | | | | | | | | | | | Change the SPI bitbanging core to fix a subtle bug (which had no effect so far) and to make integration of the RayeR SPIPGM and Nvidia MCP6x/MCP7x SPI patches easier. Kill a few global variables and require explicit initialization of bitbanging delay. A big to Johannes Sjölund for testing an earlier version of the code as part of the Nvidia MCP6x/MCP7x SPI bitbanging patch. Corresponding to flashrom svn r1085. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Remove temporary buffers from bitbangingMichael Karcher2010-07-171-38/+5
| | | | | | | | | | | | | This removes the need of allocating an extra buffer, but also removes the possibility of having the data read back during the initial write phase for debugging purposes. Compile tested, no functional testing. Corresponding to flashrom svn r1084. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Mark Fujitsu MBM29F400BC write as broken (implicit eraseblock layout in write)Carl-Daniel Hailfinger2010-07-163-59/+36
| | | | | | | | | | Use full-chip write function on Fujitsu MBM29F400TC and ST M29F400BT. Add support for ST M29F400BB. Corresponding to flashrom svn r1083. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Use generic unlocking infrastructure for SPI chipsCarl-Daniel Hailfinger2010-07-1411-24/+104
| | | | | | | | | Actually check if the unlock worked instead of just assuming it worked. Corresponding to flashrom svn r1082. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Use the max_rom_decode infrastructure for wbsio_spiCarl-Daniel Hailfinger2010-07-143-19/+4
| | | | | | | | | Use this instead of the open-coding variant that only aborts after it is too late. Corresponding to flashrom svn r1081. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Convert SPI chips to partial writeCarl-Daniel Hailfinger2010-07-1413-130/+126
| | | | | | | | | | However, wrap the write functions in a compat layer to allow converting the rest of flashrom later. Tested on Intel NM10 by David Hendricks. Corresponding to flashrom svn r1080. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Print an error message on read errors and abort instead of proceeding anywayCarl-Daniel Hailfinger2010-07-133-19/+46
| | | | | | | | | | | | | | | | | | Improve error checking in file write, chip read and chip verify. Refactor the read routines a bit to split reading from file writing. Log for a failed read: [...] Found chip "Winbond W25x16" (2048 KB, SPI) at physical address 0xffe00000. Reading flash... Invalid OPCODE 0x03 Read operation failed! FAILED. Corresponding to flashrom svn r1079. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stephen Kou <stephen@hyarros.com>
* Wrap a line which was 156 columns wideCarl-Daniel Hailfinger2010-07-131-1/+4
| | | | | | | Corresponding to flashrom svn r1078. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Split erase region walking out of erase_flashCarl-Daniel Hailfinger2010-07-131-21/+24
| | | | | | | | | | That allows us to use erase region walking for a combined erase/write action, and is a prerequisite for partial flashing, Corresponding to flashrom svn r1077. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Fix out-of-bounds ICH FREG permission printingCarl-Daniel Hailfinger2010-07-131-3/+4
| | | | | | | | | | | | | | A bit was masked, but not shifted, and that led to worst-case accesses of index 24 in an array with 4 members. I've improved readability in the variable declaration block as well. Thanks to Stephen Kou for reporting the bug. Corresponding to flashrom svn r1076. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stephen Kou <stephen@hyarros.com>
* Add support for the AMIC A25L80PDaniel Lenski2010-07-112-0/+32
| | | | | | | | | | | | | | | | | This is a 1 MB SPI chip that seems to be straightforwardly related to the AMIC A25L40PU, which has half the capacity but is otherwise identical. Datasheet is at http://www.amictechnology.com/pdf/A25L80P.pdf flashrom -VE, -Vr, and -Vw has been tested using the AMD SB7x0 interface. Everything works fine... at least, I used it to upgrade my BIOS and I've been able to reboot. Corresponding to flashrom svn r1075. Signed-off-by: Daniel Lenski <dlenski@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Fix read function for EMST F25L008AMichael Karcher2010-07-101-1/+1
| | | | | | | | | | | SPI chips never should use read_memmapped. The SPI master code might decide that read_memmapped is fine for this chip, though, in a lower layer. Corresponding to flashrom svn r1074. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
* Generify support for ITE IT8705 Super I/OCarl-Daniel Hailfinger2010-07-104-109/+174
| | | | | | | | | | | | | | | | | Autodetect the ITE IT8705 Super I/O and enable flash writes if it performs LPC->Parallel translation. Remove board enables which triggered the IT8705 write enable manually. Change the IT87 SPI special case to cover IT87 LPC->SPI and LPC->Parallel translation. Corresponding to flashrom svn r1073. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested on Syntax SV266A. Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested on Shuttle AK38N, all operations work fine. Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
* Unify programmer parameter extractionCarl-Daniel Hailfinger2010-07-0810-15/+20
| | | | | | | | | | | Make programmer_param static by converting all users to extract_programmer_param. Programmer parameters can no longer be separated with a colon, they have to be separated with a comma. Corresponding to flashrom svn r1072. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
* Fix ASUS A8N-VM CSM board enable entryMichael Karcher2010-07-082-2/+3
| | | | | | | | | | | | r1063 had several issues: The PCI IDs for this board are copy/pasted from the A8N and plain wrong for this board and the board enable is marked as tested although it isn't. Finally the board description was slightly wrong and the URL missing. Corresponding to flashrom svn r1071. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
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