summaryrefslogtreecommitdiffstats
path: root/nicrealtek.c
diff options
context:
space:
mode:
Diffstat (limited to 'nicrealtek.c')
-rw-r--r--nicrealtek.c40
1 files changed, 23 insertions, 17 deletions
diff --git a/nicrealtek.c b/nicrealtek.c
index 6f0097f..80291f1 100644
--- a/nicrealtek.c
+++ b/nicrealtek.c
@@ -30,34 +30,34 @@
#define BIOS_ROM_DATA 0xD7
struct pcidev_status nics_realtek[] = {
- {0x10ec, 0x8139, OK, "Realtek","rtl8139b/c PCI 10/100 Mbps"},
+ {0x10ec, 0x8139, OK, "Realtek", "RTL8139/8139C/8139C+"},
{},
};
struct pcidev_status nics_realteksmc1211[] = {
- {0x1113, 0x1211, OK, "SMC", "SMC 1211TX rtl8139 clone 10/100 Mbps"},
- {}
+ {0x1113, 0x1211, OK, "SMC2", "1211TX"}, /* RTL8139 clone */
+ {},
};
-
int nicrealtek_init(void)
{
get_io_perms();
+
io_base_addr = pcidev_init(PCI_VENDOR_ID_REALTEK, PCI_BASE_ADDRESS_0,
- nics_realtek, programmer_param);
-
+ nics_realtek, programmer_param);
+
buses_supported = CHIP_BUSTYPE_PARALLEL;
return 0;
}
-
int nicsmc1211_init(void)
{
get_io_perms();
+
io_base_addr = pcidev_init(PCI_VENDOR_ID_SMC1211, PCI_BASE_ADDRESS_0,
- nics_realteksmc1211, programmer_param);
-
+ nics_realteksmc1211, programmer_param);
+
buses_supported = CHIP_BUSTYPE_PARALLEL;
return 0;
@@ -73,17 +73,23 @@ int nicrealtek_shutdown(void)
void nicrealtek_chip_writeb(uint8_t val, chipaddr addr)
{
- OUTL(((uint32_t)addr &0x01FFFF)|0x0A0000| (val << 24), io_base_addr + BIOS_ROM_ADDR);
- OUTL(((uint32_t)addr &0x01FFFF)|0x1E0000| (val << 24), io_base_addr + BIOS_ROM_ADDR);
+ OUTL(((uint32_t)addr & 0x01FFFF) | 0x0A0000 | (val << 24),
+ io_base_addr + BIOS_ROM_ADDR);
+ OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24),
+ io_base_addr + BIOS_ROM_ADDR);
}
uint8_t nicrealtek_chip_readb(const chipaddr addr)
-
{
- uint8_t val=INB(io_base_addr + BIOS_ROM_DATA);
- OUTL(((uint32_t)addr & 0x01FFFF) | 0x060000 | (val << 24), io_base_addr + BIOS_ROM_ADDR);
- val=INB(io_base_addr + BIOS_ROM_DATA);
- OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24), io_base_addr + BIOS_ROM_ADDR);
- return val ;
+ uint8_t val;
+
+ val = INB(io_base_addr + BIOS_ROM_DATA);
+ OUTL(((uint32_t)addr & 0x01FFFF) | 0x060000 | (val << 24),
+ io_base_addr + BIOS_ROM_ADDR);
+
+ val = INB(io_base_addr + BIOS_ROM_DATA);
+ OUTL(((uint32_t)addr & 0x01FFFF) | 0x1E0000 | (val << 24),
+ io_base_addr + BIOS_ROM_ADDR);
+ return val;
}
OpenPOWER on IntegriCloud