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Diffstat (limited to 'flashrom.8.tmpl')
| -rw-r--r-- | flashrom.8.tmpl | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl index 81eceaa..5d08ea3 100644 --- a/flashrom.8.tmpl +++ b/flashrom.8.tmpl @@ -227,6 +227,8 @@ bitbanging adapter) .sp .BR "* nicintel_eeprom" " (for SPI EEPROMs on Intel Gigabit network cards)" .sp +.BR "* mstarddc_spi" " (for SPI flash ROMs accessible through DDC in MSTAR-equipped displays)" +.sp Some programmers have optional or mandatory parameters which are described in detail in the .B PROGRAMMER-SPECIFIC INFORMATION @@ -889,6 +891,51 @@ Example that sets the frequency to 8 MHz: .B " flashrom \-p linux_spi:dev=/dev/spidevX.Y,spispeed=8000" .sp Please note that the linux_spi driver only works on Linux. +.SS +.BR "mstarddc_spi " programmer +The Display Data Channel (DDC) is an I2C bus present on VGA and DVI connectors, that allows exchanging +informations between a computer and attached displays. Its most common uses are getting display capabilities +through EDID (at I2C address 0x50) and sending commands to the display using the DDC/CI protocol (at address +0x37). On displays driven by MSTAR SoCs, it is also possible to access the SoC firmware flash (connected to +the Soc through another SPI bus) using an In-System Programming (ISP) port, usually at address 0x49. +This flashrom module allows the latter via Linux's I2C driver. +.sp +.B IMPORTANT: +Before using this programmer, the display +.B MUST +be in standby mode, and only connected to the computer that will run flashrom using a VGA cable, to an +inactive VGA output. It absolutely +.B MUST NOT +be used as a display during the procedure! +.sp +You have to specify the DDC/I2C controller and I2C address to use with the +.sp +.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-X:YY" +.sp +syntax where +.B /dev/i2c-X +is the Linux device node for your I2C controller connected to the display's DDC channel, and +.B YY +is the (hexadecimal) address of the MSTAR ISP port (address 0x49 is usually used). +Example that uses I2C controller /dev/i2c-1 and address 0x49: +.sp +.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-1:49 +.sp +It is also possible to inhibit the reset command that is normally sent to the display once the flashrom +operation is completed using the optional +.B noreset +parameter. A value of 1 prevents flashrom from sending the reset command. +Example that does not reset the display at the end of the operation: +.sp +.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-1:49,noreset=1 +.sp +Please note that sending the reset command is also inhibited in the event an error occured during the operation. +To send the reset command afterwards, you can simply run flashrom once more, in chip probe mode (not specifying +an operation), without the +.B noreset +parameter, once the flash read/write operation you intended to perform has completed successfully. +.sp +Please also note that the mstarddc_spi driver only works on Linux. .SH EXAMPLES To back up and update your BIOS, run .sp |
