39 files changed, 194 insertions, 197 deletions

diff --git a/at45db.c b/at45db.c
index 5396d7f..3293a85 100644
--- a/at45db.c
+++ b/at45db.c
@@ -241,7 +241,7 @@ int spi_read_at45db(struct flashctx *flash, uint8_t *buf, unsigned int addr, uns
 
 	/* We have to split this up into chunks to fit within the programmer's read size limit, but those
 	 * chunks can cross page boundaries. */
-	const unsigned int max_data_read = flash->pgm->spi.max_data_read;
+	const unsigned int max_data_read = flash->mst->spi.max_data_read;
 	const unsigned int max_chunk = (max_data_read > 0) ? max_data_read : page_size;
 	while (len > 0) {
 		unsigned int chunk = min(max_chunk, len);
@@ -272,7 +272,7 @@ int spi_read_at45db_e8(struct flashctx *flash, uint8_t *buf, unsigned int addr,
 
 	/* We have to split this up into chunks to fit within the programmer's read size limit, but those
 	 * chunks can cross page boundaries. */
-	const unsigned int max_data_read = flash->pgm->spi.max_data_read;
+	const unsigned int max_data_read = flash->mst->spi.max_data_read;
 	const unsigned int max_chunk = (max_data_read > 0) ? max_data_read : page_size;
 	while (len > 0) {
 		const unsigned int addr_at45 = at45db_convert_addr(addr, page_size);
@@ -463,7 +463,7 @@ static int at45db_fill_buffer1(struct flashctx *flash, const uint8_t *bytes, uns
 	}
 
 	/* Create a suitable buffer to store opcode, address and data chunks for buffer1. */
-	const unsigned int max_data_write = flash->pgm->spi.max_data_write;
+	const unsigned int max_data_write = flash->mst->spi.max_data_write;
 	const unsigned int max_chunk = (max_data_write > 0 && max_data_write <= page_size) ?
 				       max_data_write : page_size;
 	uint8_t buf[4 + max_chunk];
diff --git a/atahpt.c b/atahpt.c
index edffa3b..5966be8 100644
--- a/atahpt.c
+++ b/atahpt.c
@@ -47,7 +47,7 @@ static void atahpt_chip_writeb(const struct flashctx *flash, uint8_t val,
 			       chipaddr addr);
 static uint8_t atahpt_chip_readb(const struct flashctx *flash,
 				 const chipaddr addr);
-static const struct par_programmer par_programmer_atahpt = {
+static const struct par_master par_master_atahpt = {
 		.chip_readb		= atahpt_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -79,7 +79,7 @@ int atahpt_init(void)
 	reg32 |= (1 << 24);
 	rpci_write_long(dev, REG_FLASH_ACCESS, reg32);
 
-	register_par_programmer(&par_programmer_atahpt, BUS_PARALLEL);
+	register_par_master(&par_master_atahpt, BUS_PARALLEL);
 
 	return 0;
 }
diff --git a/atavia.c b/atavia.c
index ef71dfa..72ec209 100644
--- a/atavia.c
+++ b/atavia.c
@@ -60,7 +60,7 @@ const struct dev_entry ata_via[] = {
 
 static void atavia_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
 static uint8_t atavia_chip_readb(const struct flashctx *flash, const chipaddr addr);
-static const struct par_programmer lpc_programmer_atavia = {
+static const struct par_master lpc_master_atavia = {
 		.chip_readb		= atavia_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -164,7 +164,7 @@ int atavia_init(void)
 		return 1;
 	}
 
-	register_par_programmer(&lpc_programmer_atavia, BUS_LPC);
+	register_par_master(&lpc_master_atavia, BUS_LPC);
 
 	return 0;
 }
diff --git a/bitbang_spi.c b/bitbang_spi.c
index b10fc26..0b27a67 100644
--- a/bitbang_spi.c
+++ b/bitbang_spi.c
@@ -63,7 +63,7 @@ static int bitbang_spi_send_command(struct flashctx *flash,
 				    const unsigned char *writearr,
 				    unsigned char *readarr);
 
-static const struct spi_programmer spi_programmer_bitbang = {
+static const struct spi_master spi_master_bitbang = {
 	.type		= SPI_CONTROLLER_BITBANG,
 	.max_data_read	= MAX_DATA_READ_UNLIMITED,
 	.max_data_write	= MAX_DATA_WRITE_UNLIMITED,
@@ -82,9 +82,9 @@ static int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
 }
 #endif
 
-int bitbang_spi_init(const struct bitbang_spi_master *master)
+int register_spi_bitbang_master(const struct bitbang_spi_master *master)
 {
-	struct spi_programmer pgm = spi_programmer_bitbang;
+	struct spi_master mst = spi_master_bitbang;
 	/* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type,
 	 * we catch it here. Same goes for missing initialization of bitbanging
 	 * functions.
@@ -98,8 +98,8 @@ int bitbang_spi_init(const struct bitbang_spi_master *master)
 		return ERROR_FLASHROM_BUG;
 	}
 
-	pgm.data = master;
-	register_spi_programmer(&pgm);
+	mst.data = master;
+	register_spi_master(&mst);
 
 	/* Only mess with the bus if we're sure nobody else uses it. */
 	bitbang_spi_request_bus(master);
@@ -137,7 +137,7 @@ static int bitbang_spi_send_command(struct flashctx *flash,
 				    unsigned char *readarr)
 {
 	int i;
-	const struct bitbang_spi_master *master = flash->pgm->spi.data;
+	const struct bitbang_spi_master *master = flash->mst->spi.data;
 
 	/* FIXME: Run bitbang_spi_request_bus here or in programmer init?
 	 * Requesting and releasing the SPI bus is handled in here to allow the
diff --git a/buspirate_spi.c b/buspirate_spi.c
index f0e84bc..b6554ac 100644
--- a/buspirate_spi.c
+++ b/buspirate_spi.c
@@ -134,7 +134,7 @@ static int buspirate_spi_send_command_v1(struct flashctx *flash, unsigned int wr
 static int buspirate_spi_send_command_v2(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
 					 const unsigned char *writearr, unsigned char *readarr);
 
-static struct spi_programmer spi_programmer_buspirate = {
+static struct spi_master spi_master_buspirate = {
 	.type		= SPI_CONTROLLER_BUSPIRATE,
 	.max_data_read	= MAX_DATA_UNSPECIFIED,
 	.max_data_write	= MAX_DATA_UNSPECIFIED,
@@ -355,9 +355,9 @@ int buspirate_spi_init(void)
 		/* Sensible default buffer size. */
 		if (buspirate_commbuf_grow(260 + 5))
 			return ERROR_OOM;
-		spi_programmer_buspirate.max_data_read = 2048;
-		spi_programmer_buspirate.max_data_write = 256;
-		spi_programmer_buspirate.command = buspirate_spi_send_command_v2;
+		spi_master_buspirate.max_data_read = 2048;
+		spi_master_buspirate.max_data_write = 256;
+		spi_master_buspirate.command = buspirate_spi_send_command_v2;
 	} else {
 		msg_pinfo("Bus Pirate firmware 5.4 and older does not support fast SPI access.\n");
 		msg_pinfo("Reading/writing a flash chip may take hours.\n");
@@ -365,9 +365,9 @@ int buspirate_spi_init(void)
 		/* Sensible default buffer size. */
 		if (buspirate_commbuf_grow(16 + 3))
 			return ERROR_OOM;
-		spi_programmer_buspirate.max_data_read = 12;
-		spi_programmer_buspirate.max_data_write = 12;
-		spi_programmer_buspirate.command = buspirate_spi_send_command_v1;
+		spi_master_buspirate.max_data_read = 12;
+		spi_master_buspirate.max_data_write = 12;
+		spi_master_buspirate.command = buspirate_spi_send_command_v1;
 	}
 
 	/* Workaround for broken speed settings in firmware 6.1 and older. */
@@ -454,7 +454,7 @@ int buspirate_spi_init(void)
 		return 1;
 	}
 
-	register_spi_programmer(&spi_programmer_buspirate);
+	register_spi_master(&spi_master_buspirate);
 
 	return 0;
 }
diff --git a/cli_classic.c b/cli_classic.c
index fc1b9ba..ee988a3 100644
--- a/cli_classic.c
+++ b/cli_classic.c
@@ -426,10 +426,10 @@ int main(int argc, char *argv[])
 	msg_pdbg("The following protocols are supported: %s.\n", tempstr);
 	free(tempstr);
 
-	for (j = 0; j < registered_programmer_count; j++) {
+	for (j = 0; j < registered_master_count; j++) {
 		startchip = 0;
 		while (chipcount < ARRAY_SIZE(flashes)) {
-			startchip = probe_flash(&registered_programmers[j], startchip, &flashes[chipcount], 0);
+			startchip = probe_flash(&registered_masters[j], startchip, &flashes[chipcount], 0);
 			if (startchip == -1)
 				break;
 			chipcount++;
@@ -452,27 +452,27 @@ int main(int argc, char *argv[])
 				  "automatically.\n");
 		}
 		if (force && read_it && chip_to_probe) {
-			struct registered_programmer *pgm;
-			int compatible_programmers = 0;
+			struct registered_master *mst;
+			int compatible_masters = 0;
 			msg_cinfo("Force read (-f -r -c) requested, pretending the chip is there:\n");
 			/* This loop just counts compatible controllers. */
-			for (j = 0; j < registered_programmer_count; j++) {
-				pgm = &registered_programmers[j];
+			for (j = 0; j < registered_master_count; j++) {
+				mst = &registered_masters[j];
 				/* chip is still set from the chip_to_probe earlier in this function. */
-				if (pgm->buses_supported & chip->bustype)
-					compatible_programmers++;
+				if (mst->buses_supported & chip->bustype)
+					compatible_masters++;
 			}
-			if (!compatible_programmers) {
+			if (!compatible_masters) {
 				msg_cinfo("No compatible controller found for the requested flash chip.\n");
 				ret = 1;
 				goto out_shutdown;
 			}
-			if (compatible_programmers > 1)
+			if (compatible_masters > 1)
 				msg_cinfo("More than one compatible controller found for the requested flash "
 					  "chip, using the first one.\n");
-			for (j = 0; j < registered_programmer_count; j++) {
-				pgm = &registered_programmers[j];
-				startchip = probe_flash(pgm, 0, &flashes[0], 1);
+			for (j = 0; j < registered_master_count; j++) {
+				mst = &registered_masters[j];
+				startchip = probe_flash(mst, 0, &flashes[0], 1);
 				if (startchip != -1)
 					break;
 			}
@@ -502,7 +502,7 @@ int main(int argc, char *argv[])
 	check_chip_supported(fill_flash->chip);
 
 	size = fill_flash->chip->total_size * 1024;
-	if (check_max_decode(fill_flash->pgm->buses_supported & fill_flash->chip->bustype, size) && (!force)) {
+	if (check_max_decode(fill_flash->mst->buses_supported & fill_flash->chip->bustype, size) && (!force)) {
 		msg_cerr("Chip is too big for this programmer (-V gives details). Use --force to override.\n");
 		ret = 1;
 		goto out_shutdown;
diff --git a/dediprog.c b/dediprog.c
index 358cac0..71a9f8b 100644
--- a/dediprog.c
+++ b/dediprog.c
@@ -750,7 +750,7 @@ static int dediprog_setup(long target)
 	return 0;
 }
 
-static const struct spi_programmer spi_programmer_dediprog = {
+static const struct spi_master spi_master_dediprog = {
 	.type		= SPI_CONTROLLER_DEDIPROG,
 	.max_data_read	= MAX_DATA_UNSPECIFIED,
 	.max_data_write	= MAX_DATA_UNSPECIFIED,
@@ -929,7 +929,7 @@ int dediprog_init(void)
 		return 1;
 	}
 
-	register_spi_programmer(&spi_programmer_dediprog);
+	register_spi_master(&spi_master_dediprog);
 
 	/* RE leftover, leave in until the driver is complete. */
 #if 0
diff --git a/drkaiser.c b/drkaiser.c
index 0cf1fdb..75cc085 100644
--- a/drkaiser.c
+++ b/drkaiser.c
@@ -45,7 +45,7 @@ static void drkaiser_chip_writeb(const struct flashctx *flash, uint8_t val,
 				 chipaddr addr);
 static uint8_t drkaiser_chip_readb(const struct flashctx *flash,
 				   const chipaddr addr);
-static const struct par_programmer par_programmer_drkaiser = {
+static const struct par_master par_master_drkaiser = {
 		.chip_readb		= drkaiser_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -81,7 +81,7 @@ int drkaiser_init(void)
 		return 1;
 
 	max_rom_decode.parallel = 128 * 1024;
-	register_par_programmer(&par_programmer_drkaiser, BUS_PARALLEL);
+	register_par_master(&par_master_drkaiser, BUS_PARALLEL);
 
 	return 0;
 }
diff --git a/dummyflasher.c b/dummyflasher.c
index f0095d1..46c540a 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -109,7 +109,7 @@ static uint16_t dummy_chip_readw(const struct flashctx *flash, const chipaddr ad
 static uint32_t dummy_chip_readl(const struct flashctx *flash, const chipaddr addr);
 static void dummy_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
 
-static const struct spi_programmer spi_programmer_dummyflasher = {
+static const struct spi_master spi_master_dummyflasher = {
 	.type		= SPI_CONTROLLER_DUMMY,
 	.max_data_read	= MAX_DATA_READ_UNLIMITED,
 	.max_data_write	= MAX_DATA_UNSPECIFIED,
@@ -120,7 +120,7 @@ static const struct spi_programmer spi_programmer_dummyflasher = {
 	.write_aai	= default_spi_write_aai,
 };
 
-static const struct par_programmer par_programmer_dummy = {
+static const struct par_master par_master_dummy = {
 		.chip_readb		= dummy_chip_readb,
 		.chip_readw		= dummy_chip_readw,
 		.chip_readl		= dummy_chip_readl,
@@ -395,12 +395,10 @@ dummy_init_out:
 		return 1;
 	}
 	if (dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH))
-		register_par_programmer(&par_programmer_dummy,
-					dummy_buses_supported &
-						(BUS_PARALLEL | BUS_LPC |
-						 BUS_FWH));
+		register_par_master(&par_master_dummy,
+				    dummy_buses_supported & (BUS_PARALLEL | BUS_LPC | BUS_FWH));
 	if (dummy_buses_supported & BUS_SPI)
-		register_spi_programmer(&spi_programmer_dummyflasher);
+		register_spi_master(&spi_master_dummyflasher);
 
 	return 0;
 }
diff --git a/flash.h b/flash.h
index c2de2d0..aa01ccf 100644
--- a/flash.h
+++ b/flash.h
@@ -212,7 +212,7 @@ struct flashctx {
 	chipaddr virtual_memory;
 	/* Some flash devices have an additional register space. */
 	chipaddr virtual_registers;
-	struct registered_programmer *pgm;
+	struct registered_master *mst;
 };
 
 /* Timing used in probe routines. ZERO is -2 to differentiate between an unset
@@ -258,7 +258,7 @@ extern const char *chip_to_probe;
 void map_flash_registers(struct flashctx *flash);
 int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int erase_flash(struct flashctx *flash);
-int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *fill_flash, int force);
+int probe_flash(struct registered_master *mst, int startchip, struct flashctx *fill_flash, int force);
 int read_flash_to_file(struct flashctx *flash, const char *filename);
 char *extract_param(const char *const *haystack, const char *needle, const char *delim);
 int verify_range(struct flashctx *flash, const uint8_t *cmpbuf, unsigned int start, unsigned int len);
diff --git a/flashrom.c b/flashrom.c
index 4f41bf4..83bc89a 100644
--- a/flashrom.c
+++ b/flashrom.c
@@ -454,7 +454,7 @@ int programmer_shutdown(void)
 	}
 
 	programmer_param = NULL;
-	registered_programmer_count = 0;
+	registered_master_count = 0;
 
 	return ret;
 }
@@ -474,43 +474,43 @@ void programmer_unmap_flash_region(void *virt_addr, size_t len)
 
 void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
 {
-	flash->pgm->par.chip_writeb(flash, val, addr);
+	flash->mst->par.chip_writeb(flash, val, addr);
 }
 
 void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr)
 {
-	flash->pgm->par.chip_writew(flash, val, addr);
+	flash->mst->par.chip_writew(flash, val, addr);
 }
 
 void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr)
 {
-	flash->pgm->par.chip_writel(flash, val, addr);
+	flash->mst->par.chip_writel(flash, val, addr);
 }
 
 void chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len)
 {
-	flash->pgm->par.chip_writen(flash, buf, addr, len);
+	flash->mst->par.chip_writen(flash, buf, addr, len);
 }
 
 uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr)
 {
-	return flash->pgm->par.chip_readb(flash, addr);
+	return flash->mst->par.chip_readb(flash, addr);
 }
 
 uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr)
 {
-	return flash->pgm->par.chip_readw(flash, addr);
+	return flash->mst->par.chip_readw(flash, addr);
 }
 
 uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr)
 {
-	return flash->pgm->par.chip_readl(flash, addr);
+	return flash->mst->par.chip_readl(flash, addr);
 }
 
 void chip_readn(const struct flashctx *flash, uint8_t *buf, chipaddr addr,
 		size_t len)
 {
-	flash->pgm->par.chip_readn(flash, buf, addr, len);
+	flash->mst->par.chip_readn(flash, buf, addr, len);
 }
 
 void programmer_delay(unsigned int usecs)
@@ -1049,7 +1049,7 @@ int check_max_decode(enum chipbustype buses, uint32_t size)
 	return 1;
 }
 
-int probe_flash(struct registered_programmer *pgm, int startchip, struct flashctx *flash, int force)
+int probe_flash(struct registered_master *mst, int startchip, struct flashctx *flash, int force)
 {
 	const struct flashchip *chip;
 	unsigned long base = 0;
@@ -1061,7 +1061,7 @@ int probe_flash(struct registered_programmer *pgm, int startchip, struct flashct
 	for (chip = flashchips + startchip; chip && chip->name; chip++) {
 		if (chip_to_probe && strcmp(chip->name, chip_to_probe) != 0)
 			continue;
-		buses_common = pgm->buses_supported & chip->bustype;
+		buses_common = mst->buses_supported & chip->bustype;
 		if (!buses_common)
 			continue;
 		msg_gdbg("Probing for %s %s, %d kB: ", chip->vendor, chip->name, chip->total_size);
@@ -1080,7 +1080,7 @@ int probe_flash(struct registered_programmer *pgm, int startchip, struct flashct
 			exit(1);
 		}
 		memcpy(flash->chip, chip, sizeof(struct flashchip));
-		flash->pgm = pgm;
+		flash->mst = mst;
 
 		base = flashbase ? flashbase : (0xffffffff - size + 1);
 		flash->virtual_memory = (chipaddr)programmer_map_flash_region("flash chip", base, size);
@@ -1098,7 +1098,7 @@ int probe_flash(struct registered_programmer *pgm, int startchip, struct flashct
 		 * If this is not the first chip found, accept it only if it is
 		 * a non-generic match. SFDP and CFI are generic matches.
 		 * startchip==0 means this call to probe_flash() is the first
-		 * one for this programmer interface and thus no other chip has
+		 * one for this programmer interface (master) and thus no other chip has
 		 * been found on this interface.
 		 */
 		if (startchip == 0 && flash->chip->model_id == SFDP_DEVICE_ID) {
diff --git a/ft2232_spi.c b/ft2232_spi.c
index e87d5ed..f74deb4 100644
--- a/ft2232_spi.c
+++ b/ft2232_spi.c
@@ -146,7 +146,7 @@ static int ft2232_spi_send_command(struct flashctx *flash,
 				   const unsigned char *writearr,
 				   unsigned char *readarr);
 
-static const struct spi_programmer spi_programmer_ft2232 = {
+static const struct spi_master spi_master_ft2232 = {
 	.type		= SPI_CONTROLLER_FT2232,
 	.max_data_read	= 64 * 1024,
 	.max_data_write	= 256,
@@ -389,7 +389,7 @@ int ft2232_spi_init(void)
 		goto ftdi_err;
 	}
 
-	register_spi_programmer(&spi_programmer_ft2232);
+	register_spi_master(&spi_master_ft2232);
 
 	return 0;
 
diff --git a/gfxnvidia.c b/gfxnvidia.c
index 2a5c7ae..1e5a23a 100644
--- a/gfxnvidia.c
+++ b/gfxnvidia.c
@@ -66,7 +66,7 @@ static void gfxnvidia_chip_writeb(const struct flashctx *flash, uint8_t val,
 				  chipaddr addr);
 static uint8_t gfxnvidia_chip_readb(const struct flashctx *flash,
 				    const chipaddr addr);
-static const struct par_programmer par_programmer_gfxnvidia = {
+static const struct par_master par_master_gfxnvidia = {
 		.chip_readb		= gfxnvidia_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -107,7 +107,7 @@ int gfxnvidia_init(void)
 
 	/* Write/erase doesn't work. */
 	programmer_may_write = 0;
-	register_par_programmer(&par_programmer_gfxnvidia, BUS_PARALLEL);
+	register_par_master(&par_master_gfxnvidia, BUS_PARALLEL);
 
 	return 0;
 }
diff --git a/ichspi.c b/ichspi.c
index 190ad5a..90bb0de 100644
--- a/ichspi.c
+++ b/ichspi.c
@@ -640,7 +640,7 @@ static void ich_set_bbar(uint32_t min_addr)
 
 /* Read len bytes from the fdata/spid register into the data array.
  *
- * Note that using len > flash->pgm->spi.max_data_read will return garbage or
+ * Note that using len > flash->mst->spi.max_data_read will return garbage or
  * may even crash.
  */
 static void ich_read_data(uint8_t *data, int len, int reg0_off)
@@ -658,7 +658,7 @@ static void ich_read_data(uint8_t *data, int len, int reg0_off)
 
 /* Fill len bytes from the data array into the fdata/spid registers.
  *
- * Note that using len > flash->pgm->spi.max_data_write will trash the registers
+ * Note that using len > flash->mst->spi.max_data_write will trash the registers
  * following the data registers.
  */
 static void ich_fill_data(const uint8_t *data, int len, int reg0_off)
@@ -965,7 +965,7 @@ static int run_opcode(const struct flashctx *flash, OPCODE op, uint32_t offset,
 		      uint8_t datalength, uint8_t * data)
 {
 	/* max_data_read == max_data_write for all Intel/VIA SPI masters */
-	uint8_t maxlength = flash->pgm->spi.max_data_read;
+	uint8_t maxlength = flash->mst->spi.max_data_read;
 
 	if (ich_generation == CHIPSET_ICH_UNKNOWN) {
 		msg_perr("%s: unsupported chipset\n", __func__);
@@ -1307,7 +1307,7 @@ static int ich_hwseq_read(struct flashctx *flash, uint8_t *buf,
 	REGWRITE16(ICH9_REG_HSFS, REGREAD16(ICH9_REG_HSFS));
 
 	while (len > 0) {
-		block_len = min(len, flash->pgm->opaque.max_data_read);
+		block_len = min(len, flash->mst->opaque.max_data_read);
 		ich_hwseq_set_addr(addr);
 		hsfc = REGREAD16(ICH9_REG_HSFC);
 		hsfc &= ~HSFC_FCYCLE; /* set read operation */
@@ -1345,7 +1345,7 @@ static int ich_hwseq_write(struct flashctx *flash, const uint8_t *buf, unsigned
 
 	while (len > 0) {
 		ich_hwseq_set_addr(addr);
-		block_len = min(len, flash->pgm->opaque.max_data_write);
+		block_len = min(len, flash->mst->opaque.max_data_write);
 		ich_fill_data(buf, block_len, ICH9_REG_FDATA0);
 		hsfc = REGREAD16(ICH9_REG_HSFC);
 		hsfc &= ~HSFC_FCYCLE; /* clear operation */
@@ -1521,7 +1521,7 @@ static void ich9_set_pr(int i, int read_prot, int write_prot)
 	msg_gspew("resulted in 0x%08x.\n", mmio_readl(addr));
 }
 
-static const struct spi_programmer spi_programmer_ich7 = {
+static const struct spi_master spi_master_ich7 = {
 	.type = SPI_CONTROLLER_ICH7,
 	.max_data_read = 64,
 	.max_data_write = 64,
@@ -1532,7 +1532,7 @@ static const struct spi_programmer spi_programmer_ich7 = {
 	.write_aai = default_spi_write_aai,
 };
 
-static const struct spi_programmer spi_programmer_ich9 = {
+static const struct spi_master spi_master_ich9 = {
 	.type = SPI_CONTROLLER_ICH9,
 	.max_data_read = 64,
 	.max_data_write = 64,
@@ -1543,7 +1543,7 @@ static const struct spi_programmer spi_programmer_ich9 = {
 	.write_aai = default_spi_write_aai,
 };
 
-static const struct opaque_programmer opaque_programmer_ich_hwseq = {
+static const struct opaque_master opaque_master_ich_hwseq = {
 	.max_data_read = 64,
 	.max_data_write = 64,
 	.probe = ich_hwseq_probe,
@@ -1604,7 +1604,7 @@ int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_gen)
 		}
 		ich_init_opcodes();
 		ich_set_bbar(0);
-		register_spi_programmer(&spi_programmer_ich7);
+		register_spi_master(&spi_master_ich7);
 		break;
 	case CHIPSET_ICH8:
 	default:		/* Future version might behave the same */
@@ -1785,9 +1785,9 @@ int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_gen)
 			}
 			hwseq_data.size_comp0 = getFCBA_component_density(&desc, 0);
 			hwseq_data.size_comp1 = getFCBA_component_density(&desc, 1);
-			register_opaque_programmer(&opaque_programmer_ich_hwseq);
+			register_opaque_master(&opaque_master_ich_hwseq);
 		} else {
-			register_spi_programmer(&spi_programmer_ich9);
+			register_spi_master(&spi_master_ich9);
 		}
 		break;
 	}
@@ -1795,7 +1795,7 @@ int ich_init_spi(struct pci_dev *dev, void *spibar, enum ich_chipset ich_gen)
 	return 0;
 }
 
-static const struct spi_programmer spi_programmer_via = {
+static const struct spi_master spi_master_via = {
 	.type = SPI_CONTROLLER_VIA,
 	.max_data_read = 16,
 	.max_data_write = 16,
@@ -1818,7 +1818,7 @@ int via_init_spi(struct pci_dev *dev, uint32_t mmio_base)
 	/* Not sure if it speaks all these bus protocols. */
 	internal_buses_supported = BUS_LPC | BUS_FWH;
 	ich_generation = CHIPSET_ICH7;
-	register_spi_programmer(&spi_programmer_via);
+	register_spi_master(&spi_master_via);
 
 	msg_pdbg("0x00: 0x%04x     (SPIS)\n", mmio_readw(ich_spibar + 0));
 	msg_pdbg("0x02: 0x%04x     (SPIC)\n", mmio_readw(ich_spibar + 2));
diff --git a/internal.c b/internal.c
index 30b184f..54b2aa3 100644
--- a/internal.c
+++ b/internal.c
@@ -145,7 +145,7 @@ static uint32_t internal_chip_readl(const struct flashctx *flash,
 				    const chipaddr addr);
 static void internal_chip_readn(const struct flashctx *flash, uint8_t *buf,
 				const chipaddr addr, size_t len);
-static const struct par_programmer par_programmer_internal = {
+static const struct par_master par_master_internal = {
 		.chip_readb		= internal_chip_readb,
 		.chip_readw		= internal_chip_readw,
 		.chip_readl		= internal_chip_readl,
@@ -342,7 +342,7 @@ int internal_init(void)
 	}
 
 #if defined(__i386__) || defined(__x86_64__) || defined (__mips)
-	register_par_programmer(&par_programmer_internal, internal_buses_supported);
+	register_par_master(&par_master_internal, internal_buses_supported);
 	return 0;
 #else
 	msg_perr("Your platform is not supported yet for the internal "
diff --git a/it8212.c b/it8212.c
index 4d1c403..c63be8e 100644
--- a/it8212.c
+++ b/it8212.c
@@ -38,7 +38,7 @@ const struct dev_entry devs_it8212[] = {
 
 static void it8212_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
 static uint8_t it8212_chip_readb(const struct flashctx *flash, const chipaddr addr);
-static const struct par_programmer par_programmer_it8212 = {
+static const struct par_master par_master_it8212 = {
 		.chip_readb		= it8212_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -71,7 +71,7 @@ int it8212_init(void)
 	rpci_write_long(dev, PCI_ROM_ADDRESS, io_base_addr | 0x01);
 
 	max_rom_decode.parallel = IT8212_MEMMAP_SIZE;
-	register_par_programmer(&par_programmer_it8212, BUS_PARALLEL);
+	register_par_master(&par_master_it8212, BUS_PARALLEL);
 	return 0;
 }
 
diff --git a/it85spi.c b/it85spi.c
index 7efc680..1cc8730 100644
--- a/it85spi.c
+++ b/it85spi.c
@@ -279,7 +279,7 @@ static int it85xx_spi_send_command(struct flashctx *flash,
 				   const unsigned char *writearr,
 				   unsigned char *readarr);
 
-static const struct spi_programmer spi_programmer_it85xx = {
+static const struct spi_master spi_master_it85xx = {
 	.type		= SPI_CONTROLLER_IT85XX,
 	.max_data_read	= 64,
 	.max_data_write	= 64,
@@ -315,7 +315,7 @@ int it85xx_spi_init(struct superio s)
 		 * a debug message about it.
 		 */
 		/* Set this as SPI controller. */
-		register_spi_programmer(&spi_programmer_it85xx);
+		register_spi_master(&spi_master_it85xx);
 	}
 	return ret;
 }
diff --git a/it87spi.c b/it87spi.c
index 160c4b6..0a1e894 100644
--- a/it87spi.c
+++ b/it87spi.c
@@ -111,7 +111,7 @@ static int it8716f_spi_chip_read(struct flashctx *flash, uint8_t *buf,
 static int it8716f_spi_chip_write_256(struct flashctx *flash, const uint8_t *buf,
 				      unsigned int start, unsigned int len);
 
-static const struct spi_programmer spi_programmer_it87xx = {
+static const struct spi_master spi_master_it87xx = {
 	.type		= SPI_CONTROLLER_IT87XX,
 	.max_data_read	= MAX_DATA_UNSPECIFIED,
 	.max_data_write	= MAX_DATA_UNSPECIFIED,
@@ -228,7 +228,7 @@ static uint16_t it87spi_probe(uint16_t port)
 	if (internal_buses_supported & BUS_SPI)
 		msg_pdbg("Overriding chipset SPI with IT87 SPI.\n");
 	/* FIXME: Add the SPI bus or replace the other buses with it? */
-	register_spi_programmer(&spi_programmer_it87xx);
+	register_spi_master(&spi_master_it87xx);
 	return 0;
 }
 
diff --git a/linux_spi.c b/linux_spi.c
index 695032c..2315c2a 100644
--- a/linux_spi.c
+++ b/linux_spi.c
@@ -46,7 +46,7 @@ static int linux_spi_read(struct flashctx *flash, uint8_t *buf,
 static int linux_spi_write_256(struct flashctx *flash, const uint8_t *buf,
 			       unsigned int start, unsigned int len);
 
-static const struct spi_programmer spi_programmer_linux = {
+static const struct spi_master spi_master_linux = {
 	.type		= SPI_CONTROLLER_LINUX,
 	.max_data_read	= MAX_DATA_UNSPECIFIED, /* TODO? */
 	.max_data_write	= MAX_DATA_UNSPECIFIED, /* TODO? */
@@ -120,7 +120,7 @@ int linux_spi_init(void)
 		return 1;
 	}
 
-	register_spi_programmer(&spi_programmer_linux);
+	register_spi_master(&spi_master_linux);
 
 	return 0;
 }
diff --git a/mcp6x_spi.c b/mcp6x_spi.c
index 20e9bd8..38e9a8b 100644
--- a/mcp6x_spi.c
+++ b/mcp6x_spi.c
@@ -156,7 +156,7 @@ int mcp6x_spi_init(int want_spi)
 		 (status >> MCP6X_SPI_GRANT) & 0x1);
 	mcp_gpiostate = status & 0xff;
 
-	if (bitbang_spi_init(&bitbang_spi_master_mcp6x)) {
+	if (register_spi_bitbang_master(&bitbang_spi_master_mcp6x)) {
 		/* This should never happen. */
 		msg_perr("MCP6X bitbang SPI master init failed!\n");
 		return 1;
diff --git a/nic3com.c b/nic3com.c
index 145554d..4d4702a 100644
--- a/nic3com.c
+++ b/nic3com.c
@@ -61,7 +61,7 @@ static void nic3com_chip_writeb(const struct flashctx *flash, uint8_t val,
 				chipaddr addr);
 static uint8_t nic3com_chip_readb(const struct flashctx *flash,
 				  const chipaddr addr);
-static const struct par_programmer par_programmer_nic3com = {
+static const struct par_master par_master_nic3com = {
 		.chip_readb		= nic3com_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -124,7 +124,7 @@ int nic3com_init(void)
 		return 1;
 
 	max_rom_decode.parallel = 128 * 1024;
-	register_par_programmer(&par_programmer_nic3com, BUS_PARALLEL);
+	register_par_master(&par_master_nic3com, BUS_PARALLEL);
 
 	return 0;
 }
diff --git a/nicintel.c b/nicintel.c
index 98ba29f..69b40d3 100644
--- a/nicintel.c
+++ b/nicintel.c
@@ -48,7 +48,7 @@ static void nicintel_chip_writeb(const struct flashctx *flash, uint8_t val,
 				 chipaddr addr);
 static uint8_t nicintel_chip_readb(const struct flashctx *flash,
 				   const chipaddr addr);
-static const struct par_programmer par_programmer_nicintel = {
+static const struct par_master par_master_nicintel = {
 		.chip_readb		= nicintel_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -103,7 +103,7 @@ int nicintel_init(void)
 	pci_rmmio_writew(0x0001, nicintel_control_bar + CSR_FCR);
 
 	max_rom_decode.parallel = NICINTEL_MEMMAP_SIZE;
-	register_par_programmer(&par_programmer_nicintel, BUS_PARALLEL);
+	register_par_master(&par_master_nicintel, BUS_PARALLEL);
 
 	return 0;
 }
diff --git a/nicintel_spi.c b/nicintel_spi.c
index 25bfa8f..cb4a61a 100644
--- a/nicintel_spi.c
+++ b/nicintel_spi.c
@@ -207,7 +207,7 @@ int nicintel_spi_init(void)
 	if (register_shutdown(nicintel_spi_shutdown, NULL))
 		return 1;
 
-	if (bitbang_spi_init(&bitbang_spi_master_nicintel))
+	if (register_spi_bitbang_master(&bitbang_spi_master_nicintel))
 		return 1;
 
 	return 0;
diff --git a/nicnatsemi.c b/nicnatsemi.c
index acefddb..ce22c94 100644
--- a/nicnatsemi.c
+++ b/nicnatsemi.c
@@ -42,7 +42,7 @@ static void nicnatsemi_chip_writeb(const struct flashctx *flash, uint8_t val,
 				   chipaddr addr);
 static uint8_t nicnatsemi_chip_readb(const struct flashctx *flash,
 				     const chipaddr addr);
-static const struct par_programmer par_programmer_nicnatsemi = {
+static const struct par_master par_master_nicnatsemi = {
 		.chip_readb		= nicnatsemi_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -75,7 +75,7 @@ int nicnatsemi_init(void)
 	 * functions below wants to be 0x0000FFFF.
 	 */
 	max_rom_decode.parallel = 131072;
-	register_par_programmer(&par_programmer_nicnatsemi, BUS_PARALLEL);
+	register_par_master(&par_master_nicnatsemi, BUS_PARALLEL);
 
 	return 0;
 }
diff --git a/nicrealtek.c b/nicrealtek.c
index 4a440ea..07910a8 100644
--- a/nicrealtek.c
+++ b/nicrealtek.c
@@ -41,7 +41,7 @@ const struct dev_entry nics_realtek[] = {
 
 static void nicrealtek_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
 static uint8_t nicrealtek_chip_readb(const struct flashctx *flash, const chipaddr addr);
-static const struct par_programmer par_programmer_nicrealtek = {
+static const struct par_master par_master_nicrealtek = {
 		.chip_readb		= nicrealtek_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -90,7 +90,7 @@ int nicrealtek_init(void)
 	if (register_shutdown(nicrealtek_shutdown, NULL))
 		return 1;
 
-	register_par_programmer(&par_programmer_nicrealtek, BUS_PARALLEL);
+	register_par_master(&par_master_nicrealtek, BUS_PARALLEL);
 
 	return 0;
 }
diff --git a/ogp_spi.c b/ogp_spi.c
index a624dfd..929ecd9 100644
--- a/ogp_spi.c
+++ b/ogp_spi.c
@@ -140,7 +140,7 @@ int ogp_spi_init(void)
 	if (ogp_spibar == ERROR_PTR)
 		return 1;
 
-	if (bitbang_spi_init(&bitbang_spi_master_ogp))
+	if (register_spi_bitbang_master(&bitbang_spi_master_ogp))
 		return 1;
 
 	return 0;
diff --git a/opaque.c b/opaque.c
index c63919f..a5a829c 100644
--- a/opaque.c
+++ b/opaque.c
@@ -1,7 +1,7 @@
 /*
  * This file is part of the flashrom project.
  *
- * Copyright (C) 2011 Carl-Daniel Hailfinger
+ * Copyright (C) 2011,2013,2014 Carl-Daniel Hailfinger
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
@@ -18,10 +18,10 @@
  */
 
 /*
- * Contains the opaque programmer framework.
- * An opaque programmer is a programmer which does not provide direct access
+ * Contains the opaque master framework.
+ * An opaque master is a master which does not provide direct access
  * to the flash chip and which abstracts all flash chip properties into a
- * programmer specific interface.
+ * master specific interface.
  */
 
 #include <stdint.h>
@@ -32,35 +32,35 @@
 
 int probe_opaque(struct flashctx *flash)
 {
-	return flash->pgm->opaque.probe(flash);
+	return flash->mst->opaque.probe(flash);
 }
 
 int read_opaque(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
 {
-	return flash->pgm->opaque.read(flash, buf, start, len);
+	return flash->mst->opaque.read(flash, buf, start, len);
 }
 
 int write_opaque(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
 {
-	return flash->pgm->opaque.write(flash, buf, start, len);
+	return flash->mst->opaque.write(flash, buf, start, len);
 }
 
 int erase_opaque(struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen)
 {
-	return flash->pgm->opaque.erase(flash, blockaddr, blocklen);
+	return flash->mst->opaque.erase(flash, blockaddr, blocklen);
 }
 
-int register_opaque_programmer(const struct opaque_programmer *pgm)
+int register_opaque_master(const struct opaque_master *mst)
 {
-	struct registered_programmer rpgm;
+	struct registered_master rmst;
 
-	if (!pgm->probe || !pgm->read || !pgm->write || !pgm->erase) {
-		msg_perr("%s called with incomplete programmer definition. "
+	if (!mst->probe || !mst->read || !mst->write || !mst->erase) {
+		msg_perr("%s called with incomplete master definition. "
 			 "Please report a bug at flashrom@flashrom.org\n",
 			 __func__);
 		return ERROR_FLASHROM_BUG;
 	}
-	rpgm.buses_supported = BUS_PROG;
-	rpgm.opaque = *pgm;
-	return register_programmer(&rpgm);
+	rmst.buses_supported = BUS_PROG;
+	rmst.opaque = *mst;
+	return register_master(&rmst);
 }
diff --git a/pony_spi.c b/pony_spi.c
index 2a3666f..8a0f340 100644
--- a/pony_spi.c
+++ b/pony_spi.c
@@ -212,7 +212,7 @@ int pony_spi_init(void)
 		return 1;
 	}
 
-	if (bitbang_spi_init(&bitbang_spi_master_pony)) {
+	if (register_spi_bitbang_master(&bitbang_spi_master_pony)) {
 		return 1;
 	}
 	return 0;
diff --git a/programmer.c b/programmer.c
index 1874929..fd634b2 100644
--- a/programmer.c
+++ b/programmer.c
@@ -95,39 +95,39 @@ void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf,
 	return;
 }
 
-int register_par_programmer(const struct par_programmer *pgm,
+int register_par_master(const struct par_master *mst,
 			    const enum chipbustype buses)
 {
-	struct registered_programmer rpgm;
-	if (!pgm->chip_writeb || !pgm->chip_writew || !pgm->chip_writel ||
-	    !pgm->chip_writen || !pgm->chip_readb || !pgm->chip_readw ||
-	    !pgm->chip_readl || !pgm->chip_readn) {
-		msg_perr("%s called with incomplete programmer definition. "
+	struct registered_master rmst;
+	if (!mst->chip_writeb || !mst->chip_writew || !mst->chip_writel ||
+	    !mst->chip_writen || !mst->chip_readb || !mst->chip_readw ||
+	    !mst->chip_readl || !mst->chip_readn) {
+		msg_perr("%s called with incomplete master definition. "
 			 "Please report a bug at flashrom@flashrom.org\n",
 			 __func__);
 		return ERROR_FLASHROM_BUG;
 	}
 
-	rpgm.buses_supported = buses;
-	rpgm.par = *pgm;
-	return register_programmer(&rpgm);
+	rmst.buses_supported = buses;
+	rmst.par = *mst;
+	return register_master(&rmst);
 }
 
 /* The limit of 4 is totally arbitrary. */
-#define PROGRAMMERS_MAX 4
-struct registered_programmer registered_programmers[PROGRAMMERS_MAX];
-int registered_programmer_count = 0;
+#define MASTERS_MAX 4
+struct registered_master registered_masters[MASTERS_MAX];
+int registered_master_count = 0;
 
-/* This function copies the struct registered_programmer parameter. */
-int register_programmer(struct registered_programmer *pgm)
+/* This function copies the struct registered_master parameter. */
+int register_master(struct registered_master *mst)
 {
-	if (registered_programmer_count >= PROGRAMMERS_MAX) {
-		msg_perr("Tried to register more than %i programmer "
-			 "interfaces.\n", PROGRAMMERS_MAX);
+	if (registered_master_count >= MASTERS_MAX) {
+		msg_perr("Tried to register more than %i master "
+			 "interfaces.\n", MASTERS_MAX);
 		return ERROR_FLASHROM_LIMIT;
 	}
-	registered_programmers[registered_programmer_count] = *pgm;
-	registered_programmer_count++;
+	registered_masters[registered_master_count] = *mst;
+	registered_master_count++;
 
 	return 0;
 }
@@ -137,8 +137,8 @@ enum chipbustype get_buses_supported(void)
 	int i;
 	enum chipbustype ret = BUS_NONE;
 
-	for (i = 0; i < registered_programmer_count; i++)
-		ret |= registered_programmers[i].buses_supported;
+	for (i = 0; i < registered_master_count; i++)
+		ret |= registered_masters[i].buses_supported;
 
 	return ret;
 }
diff --git a/programmer.h b/programmer.h
index b0df2ba..093240b 100644
--- a/programmer.h
+++ b/programmer.h
@@ -476,7 +476,7 @@ int pony_spi_init(void);
 #endif
 
 /* bitbang_spi.c */
-int bitbang_spi_init(const struct bitbang_spi_master *master);
+int register_spi_bitbang_master(const struct bitbang_spi_master *master);
 
 /* buspirate_spi.c */
 #if CONFIG_BUSPIRATE_SPI == 1
@@ -552,7 +552,7 @@ enum spi_controller {
 #define MAX_DATA_UNSPECIFIED 0
 #define MAX_DATA_READ_UNLIMITED 64 * 1024
 #define MAX_DATA_WRITE_UNLIMITED 256
-struct spi_programmer {
+struct spi_master {
 	enum spi_controller type;
 	unsigned int max_data_read;
 	unsigned int max_data_write;
@@ -560,7 +560,7 @@ struct spi_programmer {
 		   const unsigned char *writearr, unsigned char *readarr);
 	int (*multicommand)(struct flashctx *flash, struct spi_command *cmds);
 
-	/* Optimized functions for this programmer */
+	/* Optimized functions for this master */
 	int (*read)(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 	int (*write_256)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
 	int (*write_aai)(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
@@ -573,7 +573,7 @@ int default_spi_send_multicommand(struct flashctx *flash, struct spi_command *cm
 int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
 int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
-int register_spi_programmer(const struct spi_programmer *programmer);
+int register_spi_master(const struct spi_master *mst);
 
 /* The following enum is needed by ich_descriptor_tool and ich* code as well as in chipset_enable.c. */
 enum ich_chipset {
@@ -625,17 +625,17 @@ int wbsio_check_for_spi(void);
 #endif
 
 /* opaque.c */
-struct opaque_programmer {
+struct opaque_master {
 	int max_data_read;
 	int max_data_write;
-	/* Specific functions for this programmer */
+	/* Specific functions for this master */
 	int (*probe) (struct flashctx *flash);
 	int (*read) (struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len);
 	int (*write) (struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len);
 	int (*erase) (struct flashctx *flash, unsigned int blockaddr, unsigned int blocklen);
 	const void *data;
 };
-int register_opaque_programmer(const struct opaque_programmer *pgm);
+int register_opaque_master(const struct opaque_master *mst);
 
 /* programmer.c */
 int noop_shutdown(void);
@@ -648,7 +648,7 @@ void fallback_chip_writen(const struct flashctx *flash, const uint8_t *buf, chip
 uint16_t fallback_chip_readw(const struct flashctx *flash, const chipaddr addr);
 uint32_t fallback_chip_readl(const struct flashctx *flash, const chipaddr addr);
 void fallback_chip_readn(const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
-struct par_programmer {
+struct par_master {
 	void (*chip_writeb) (const struct flashctx *flash, uint8_t val, chipaddr addr);
 	void (*chip_writew) (const struct flashctx *flash, uint16_t val, chipaddr addr);
 	void (*chip_writel) (const struct flashctx *flash, uint32_t val, chipaddr addr);
@@ -659,18 +659,18 @@ struct par_programmer {
 	void (*chip_readn) (const struct flashctx *flash, uint8_t *buf, const chipaddr addr, size_t len);
 	const void *data;
 };
-int register_par_programmer(const struct par_programmer *pgm, const enum chipbustype buses);
-struct registered_programmer {
+int register_par_master(const struct par_master *mst, const enum chipbustype buses);
+struct registered_master {
 	enum chipbustype buses_supported;
 	union {
-		struct par_programmer par;
-		struct spi_programmer spi;
-		struct opaque_programmer opaque;
+		struct par_master par;
+		struct spi_master spi;
+		struct opaque_master opaque;
 	};
 };
-extern struct registered_programmer registered_programmers[];
-extern int registered_programmer_count;
-int register_programmer(struct registered_programmer *pgm);
+extern struct registered_master registered_masters[];
+extern int registered_master_count;
+int register_master(struct registered_master *mst);
 
 /* serprog.c */
 #if CONFIG_SERPROG == 1
diff --git a/rayer_spi.c b/rayer_spi.c
index 189341a..4f1eee4 100644
--- a/rayer_spi.c
+++ b/rayer_spi.c
@@ -228,7 +228,7 @@ int rayer_spi_init(void)
 	if (pinout->preinit)
 		pinout->preinit(pinout);
 
-	if (bitbang_spi_init(&bitbang_spi_master_rayer))
+	if (register_spi_bitbang_master(&bitbang_spi_master_rayer))
 		return 1;
 
 	return 0;
diff --git a/satamv.c b/satamv.c
index e03508e..e76d126 100644
--- a/satamv.c
+++ b/satamv.c
@@ -46,7 +46,7 @@ static void satamv_chip_writeb(const struct flashctx *flash, uint8_t val,
 			       chipaddr addr);
 static uint8_t satamv_chip_readb(const struct flashctx *flash,
 				 const chipaddr addr);
-static const struct par_programmer par_programmer_satamv = {
+static const struct par_master par_master_satamv = {
 		.chip_readb		= satamv_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -152,7 +152,7 @@ int satamv_init(void)
 	/* 512 kByte with two 8-bit latches, and
 	 * 4 MByte with additional 3-bit latch. */
 	max_rom_decode.parallel = 4 * 1024 * 1024;
-	register_par_programmer(&par_programmer_satamv, BUS_PARALLEL);
+	register_par_master(&par_master_satamv, BUS_PARALLEL);
 
 	return 0;
 }
diff --git a/satasii.c b/satasii.c
index 83dc62c..368d7d4 100644
--- a/satasii.c
+++ b/satasii.c
@@ -43,7 +43,7 @@ const struct dev_entry satas_sii[] = {
 
 static void satasii_chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr);
 static uint8_t satasii_chip_readb(const struct flashctx *flash, const chipaddr addr);
-static const struct par_programmer par_programmer_satasii = {
+static const struct par_master par_master_satasii = {
 		.chip_readb		= satasii_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -104,7 +104,7 @@ int satasii_init(void)
 	if ((id != 0x0680) && (!(pci_mmio_readl(sii_bar) & (1 << 26))))
 		msg_pwarn("Warning: Flash seems unconnected.\n");
 
-	register_par_programmer(&par_programmer_satasii, BUS_PARALLEL);
+	register_par_master(&par_master_satasii, BUS_PARALLEL);
 
 	return 0;
 }
diff --git a/sb600spi.c b/sb600spi.c
index b7f87ca..5710fb2 100644
--- a/sb600spi.c
+++ b/sb600spi.c
@@ -64,7 +64,7 @@ static int sb600_spi_send_command(struct flashctx *flash, unsigned int writecnt,
 static int spi100_spi_send_command(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
 				  const unsigned char *writearr, unsigned char *readarr);
 
-static struct spi_programmer spi_programmer_sb600 = {
+static struct spi_master spi_master_sb600 = {
 	.type = SPI_CONTROLLER_SB600,
 	.max_data_read = FIFO_SIZE_OLD,
 	.max_data_write = FIFO_SIZE_OLD - 3,
@@ -75,7 +75,7 @@ static struct spi_programmer spi_programmer_sb600 = {
 	.write_aai = default_spi_write_aai,
 };
 
-static struct spi_programmer spi_programmer_yangtze = {
+static struct spi_master spi_master_yangtze = {
 	.type = SPI_CONTROLLER_YANGTZE,
 	.max_data_read = FIFO_SIZE_YANGTZE - 3, /* Apparently the big SPI 100 buffer is not a ring buffer. */
 	.max_data_write = FIFO_SIZE_YANGTZE - 3,
@@ -184,14 +184,14 @@ static int compare_internal_fifo_pointer(uint8_t want)
 /* Check the number of bytes to be transmitted and extract opcode. */
 static int check_readwritecnt(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt)
 {
-	unsigned int maxwritecnt = flash->pgm->spi.max_data_write + 3;
+	unsigned int maxwritecnt = flash->mst->spi.max_data_write + 3;
 	if (writecnt > maxwritecnt) {
 		msg_pinfo("%s: SPI controller can not send %d bytes, it is limited to %d bytes\n",
 			  __func__, writecnt, maxwritecnt);
 		return SPI_INVALID_LENGTH;
 	}
 
-	unsigned int maxreadcnt = flash->pgm->spi.max_data_read + 3;
+	unsigned int maxreadcnt = flash->mst->spi.max_data_read + 3;
 	if (readcnt > maxreadcnt) {
 		msg_pinfo("%s: SPI controller can not receive %d bytes, it is limited to %d bytes\n",
 			  __func__, readcnt, maxreadcnt);
@@ -690,9 +690,9 @@ int sb600_probe_spi(struct pci_dev *dev)
 
 	/* Starting with Yangtze the SPI controller got a different interface with a much bigger buffer. */
 	if (amd_gen != CHIPSET_YANGTZE)
-		register_spi_programmer(&spi_programmer_sb600);
+		register_spi_master(&spi_master_sb600);
 	else
-		register_spi_programmer(&spi_programmer_yangtze);
+		register_spi_master(&spi_master_yangtze);
 	return 0;
 }
 
diff --git a/serprog.c b/serprog.c
index 5f26aea..e52c994 100644
--- a/serprog.c
+++ b/serprog.c
@@ -303,7 +303,7 @@ static int serprog_spi_send_command(struct flashctx *flash,
 				    unsigned char *readarr);
 static int serprog_spi_read(struct flashctx *flash, uint8_t *buf,
 			    unsigned int start, unsigned int len);
-static struct spi_programmer spi_programmer_serprog = {
+static struct spi_master spi_master_serprog = {
 	.type		= SPI_CONTROLLER_SERPROG,
 	.max_data_read	= MAX_DATA_READ_UNLIMITED,
 	.max_data_write	= MAX_DATA_WRITE_UNLIMITED,
@@ -320,7 +320,7 @@ static uint8_t serprog_chip_readb(const struct flashctx *flash,
 				  const chipaddr addr);
 static void serprog_chip_readn(const struct flashctx *flash, uint8_t *buf,
 			       const chipaddr addr, size_t len);
-static const struct par_programmer par_programmer_serprog = {
+static const struct par_master par_master_serprog = {
 		.chip_readb		= serprog_chip_readb,
 		.chip_readw		= fallback_chip_readw,
 		.chip_readl		= fallback_chip_readl,
@@ -489,7 +489,7 @@ int serprog_init(void)
 			v |= ((unsigned int)(rbuf[2]) << 16);
 			if (v == 0)
 				v = (1 << 24) - 1; /* SPI-op maximum. */
-			spi_programmer_serprog.max_data_write = v;
+			spi_master_serprog.max_data_write = v;
 			msg_pdbg(MSGHEADER "Maximum write-n length is %d\n", v);
 		}
 		if (!sp_docommand(S_CMD_Q_RDNMAXLEN, 0, NULL, 3, rbuf)) {
@@ -499,7 +499,7 @@ int serprog_init(void)
 			v |= ((unsigned int)(rbuf[2]) << 16);
 			if (v == 0)
 				v = (1 << 24) - 1; /* SPI-op maximum. */
-			spi_programmer_serprog.max_data_read = v;
+			spi_master_serprog.max_data_read = v;
 			msg_pdbg(MSGHEADER "Maximum read-n length is %d\n", v);
 		}
 		spispeed = extract_programmer_param("spispeed");
@@ -669,10 +669,9 @@ int serprog_init(void)
 	sp_streamed_transmit_bytes = 0;
 	sp_opbuf_usage = 0;
 	if (serprog_buses_supported & BUS_SPI)
-		register_spi_programmer(&spi_programmer_serprog);
+		register_spi_master(&spi_master_serprog);
 	if (serprog_buses_supported & BUS_NONSPI)
-		register_par_programmer(&par_programmer_serprog,
-					serprog_buses_supported & BUS_NONSPI);
+		register_par_master(&par_master_serprog, serprog_buses_supported & BUS_NONSPI);
 	return 0;
 }
 
@@ -932,7 +931,7 @@ static int serprog_spi_read(struct flashctx *flash, uint8_t *buf,
 			    unsigned int start, unsigned int len)
 {
 	unsigned int i, cur_len;
-	const unsigned int max_read = spi_programmer_serprog.max_data_read;
+	const unsigned int max_read = spi_master_serprog.max_data_read;
 	for (i = 0; i < len; i += cur_len) {
 		int ret;
 		cur_len = min(max_read, (len - i));
diff --git a/spi.c b/spi.c
index d6cbb88..894f73f 100644
--- a/spi.c
+++ b/spi.c
@@ -34,13 +34,13 @@ int spi_send_command(struct flashctx *flash, unsigned int writecnt,
 		     unsigned int readcnt, const unsigned char *writearr,
 		     unsigned char *readarr)
 {
-	return flash->pgm->spi.command(flash, writecnt, readcnt, writearr,
+	return flash->mst->spi.command(flash, writecnt, readcnt, writearr,
 				       readarr);
 }
 
 int spi_send_multicommand(struct flashctx *flash, struct spi_command *cmds)
 {
-	return flash->pgm->spi.multicommand(flash, cmds);
+	return flash->mst->spi.multicommand(flash, cmds);
 }
 
 int default_spi_send_command(struct flashctx *flash, unsigned int writecnt,
@@ -78,7 +78,7 @@ int default_spi_send_multicommand(struct flashctx *flash,
 int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
 		     unsigned int len)
 {
-	unsigned int max_data = flash->pgm->spi.max_data_read;
+	unsigned int max_data = flash->mst->spi.max_data_read;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
 		msg_perr("%s called, but SPI read chunk size not defined "
 			 "on this hardware. Please report a bug at "
@@ -90,7 +90,7 @@ int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
 
 int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
 {
-	unsigned int max_data = flash->pgm->spi.max_data_write;
+	unsigned int max_data = flash->mst->spi.max_data_write;
 	if (max_data == MAX_DATA_UNSPECIFIED) {
 		msg_perr("%s called, but SPI write chunk size not defined "
 			 "on this hardware. Please report a bug at "
@@ -124,7 +124,7 @@ int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
 			 "access window.\n");
 		msg_perr("Read will probably return garbage.\n");
 	}
-	return flash->pgm->spi.read(flash, buf, addrbase + start, len);
+	return flash->mst->spi.read(flash, buf, addrbase + start, len);
 }
 
 /*
@@ -136,17 +136,17 @@ int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
 /* real chunksize is up to 256, logical chunksize is 256 */
 int spi_chip_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
 {
-	return flash->pgm->spi.write_256(flash, buf, start, len);
+	return flash->mst->spi.write_256(flash, buf, start, len);
 }
 
 /*
  * Get the lowest allowed address for read accesses. This often happens to
  * be the lowest allowed address for all commands which take an address.
- * This is a programmer limitation.
+ * This is a master limitation.
  */
 uint32_t spi_get_valid_read_addr(struct flashctx *flash)
 {
-	switch (flash->pgm->spi.type) {
+	switch (flash->mst->spi.type) {
 #if CONFIG_INTERNAL == 1
 #if defined(__i386__) || defined(__x86_64__)
 	case SPI_CONTROLLER_ICH7:
@@ -162,25 +162,25 @@ uint32_t spi_get_valid_read_addr(struct flashctx *flash)
 
 int spi_aai_write(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
 {
-	return flash->pgm->spi.write_aai(flash, buf, start, len);
+	return flash->mst->spi.write_aai(flash, buf, start, len);
 }
 
-int register_spi_programmer(const struct spi_programmer *pgm)
+int register_spi_master(const struct spi_master *mst)
 {
-	struct registered_programmer rpgm;
+	struct registered_master rmst;
 
-	if (!pgm->write_aai || !pgm->write_256 || !pgm->read || !pgm->command ||
-	    !pgm->multicommand ||
-	    ((pgm->command == default_spi_send_command) &&
-	     (pgm->multicommand == default_spi_send_multicommand))) {
-		msg_perr("%s called with incomplete programmer definition. "
+	if (!mst->write_aai || !mst->write_256 || !mst->read || !mst->command ||
+	    !mst->multicommand ||
+	    ((mst->command == default_spi_send_command) &&
+	     (mst->multicommand == default_spi_send_multicommand))) {
+		msg_perr("%s called with incomplete master definition. "
 			 "Please report a bug at flashrom@flashrom.org\n",
 			 __func__);
 		return ERROR_FLASHROM_BUG;
 	}
 
 
-	rpgm.buses_supported = BUS_SPI;
-	rpgm.spi = *pgm;
-	return register_programmer(&rpgm);
+	rmst.buses_supported = BUS_SPI;
+	rmst.spi = *mst;
+	return register_master(&rmst);
 }
diff --git a/spi25.c b/spi25.c
index 9763c80..673bdf5 100644
--- a/spi25.c
+++ b/spi25.c
@@ -172,7 +172,7 @@ int probe_spi_rdid4(struct flashctx *flash)
 	/* Some SPI controllers do not support commands with writecnt=1 and
 	 * readcnt=4.
 	 */
-	switch (flash->pgm->spi.type) {
+	switch (flash->mst->spi.type) {
 #if CONFIG_INTERNAL == 1
 #if defined(__i386__) || defined(__x86_64__)
 	case SPI_CONTROLLER_IT87XX:
@@ -1079,7 +1079,7 @@ int default_spi_write_aai(struct flashctx *flash, const uint8_t *buf, unsigned i
 		.readarr	= NULL,
 	}};
 
-	switch (flash->pgm->spi.type) {
+	switch (flash->mst->spi.type) {
 #if CONFIG_INTERNAL == 1
 #if defined(__i386__) || defined(__x86_64__)
 	case SPI_CONTROLLER_IT87XX:
diff --git a/usbblaster_spi.c b/usbblaster_spi.c
index 86fd573..7a609f1 100644
--- a/usbblaster_spi.c
+++ b/usbblaster_spi.c
@@ -55,7 +55,7 @@ const struct dev_entry devs_usbblasterspi[] = {
 	{}
 };
 
-static const struct spi_programmer spi_programmer_usbblaster;
+static const struct spi_master spi_master_usbblaster;
 
 static struct ftdi_context ftdic;
 
@@ -117,7 +117,7 @@ int usbblaster_spi_init(void)
 		return -1;
 	}
 
-	register_spi_programmer(&spi_programmer_usbblaster);
+	register_spi_master(&spi_master_usbblaster);
 	return 0;
 }
 
@@ -211,7 +211,7 @@ static int usbblaster_spi_send_command(struct flashctx *flash, unsigned int writ
 }
 
 
-static const struct spi_programmer spi_programmer_usbblaster = {
+static const struct spi_master spi_master_usbblaster = {
 	.type		= SPI_CONTROLLER_USBBLASTER,
 	.max_data_read	= 256,
 	.max_data_write	= 256,
diff --git a/wbsio_spi.c b/wbsio_spi.c
index 7d4bb2a..0eeeb9b 100644
--- a/wbsio_spi.c
+++ b/wbsio_spi.c
@@ -68,7 +68,7 @@ static int wbsio_spi_send_command(struct flashctx *flash, unsigned int writecnt,
 static int wbsio_spi_read(struct flashctx *flash, uint8_t *buf,
 			  unsigned int start, unsigned int len);
 
-static const struct spi_programmer spi_programmer_wbsio = {
+static const struct spi_master spi_master_wbsio = {
 	.type = SPI_CONTROLLER_WBSIO,
 	.max_data_read = MAX_DATA_UNSPECIFIED,
 	.max_data_write = MAX_DATA_UNSPECIFIED,
@@ -90,7 +90,7 @@ int wbsio_check_for_spi(void)
 	msg_pdbg("%s: Winbond saved on 4 register bits so max chip size is "
 		 "1024 kB!\n", __func__);
 	max_rom_decode.spi = 1024 * 1024;
-	register_spi_programmer(&spi_programmer_wbsio);
+	register_spi_master(&spi_master_wbsio);
 
 	return 0;
 }