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-rw-r--r--board_enable.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/board_enable.c b/board_enable.c
index 9ac5653..7b1fa12 100644
--- a/board_enable.c
+++ b/board_enable.c
@@ -1019,6 +1019,14 @@ static int board_soyo_sy_7vca(const char *name)
}
/**
+ * Suited for Abit VT6X5: Pro133x + VT82C686A
+ */
+static int via_apollo_gpo4_lower(const char *name)
+{
+ return via_apollo_gpo_set(4, 0);
+}
+
+/**
* Enable some GPIO pin on SiS southbridge.
* Suited for MSI 651M-L: SiS651 / SiS962
*/
@@ -1263,6 +1271,7 @@ struct board_pciid_enable board_pciid_enables[] = {
/* first pci-id set [4], second pci-id set [4], dmi identifier coreboot id [2], vendor name board name max_rom_... OK? flash enable */
{0x8086, 0x2926, 0x147b, 0x1084, 0x11ab, 0x4364, 0x147b, 0x1084, NULL, NULL, NULL, "Abit", "IP35", 0, OK, intel_ich_gpio16_raise},
{0x8086, 0x2930, 0x147b, 0x1083, 0x10ec, 0x8167, 0x147b, 0x1083, NULL, NULL, NULL, "Abit", "IP35 Pro", 0, OK, intel_ich_gpio16_raise},
+ {0x1106, 0x0691, 0, 0, 0x1106, 0x3057, 0, 0, NULL, "abit", "vt6x4", "Abit", "VT6X4", 0, NT, via_apollo_gpo4_lower},
{0x105a, 0x0d30, 0x105a, 0x4d33, 0x8086, 0x1130, 0x8086, 0, NULL, NULL, NULL, "Acorp", "6A815EPD", 0, OK, board_acorp_6a815epd},
{0x8086, 0x24D4, 0x1849, 0x24D0, 0x8086, 0x24D5, 0x1849, 0x9739, NULL, NULL, NULL, "ASRock", "P4i65GV", 0, OK, intel_ich_gpio23_raise},
{0x1022, 0x746B, 0, 0, 0, 0, 0, 0, NULL, "AGAMI", "ARUMA", "agami", "Aruma", 0, OK, w83627hf_gpio24_raise_2e},
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