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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-05-09 02:30:21 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-05-09 02:30:21 +0000
commit96930c39524225cc55a5625e6e45d7519b3f2528 (patch)
tree40368d966ea3689aa4c8c2b020984671cc45d1d9 /wbsio_spi.c
parent03adbe12691d512c0d9f28caa93cb35e468fd5d3 (diff)
downloadast2050-flashrom-96930c39524225cc55a5625e6e45d7519b3f2528.zip
ast2050-flashrom-96930c39524225cc55a5625e6e45d7519b3f2528.tar.gz
Chips like the SST SST25VF080B can only handle single byte writes outside AAI mode
Change SPI architecture to handle 1-byte chunk chip writing differently from 256-byte chunk chip writing. Annotate SPI chip write functions with _256 or _1 suffix denoting the number of bytes they write at maximum. The 1-byte chunk writing is cut-n-pasted to different SPI drivers right now. A later patch can move them to the generic spi_chip_write_1. Corresponding to flashrom svn r485. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to 'wbsio_spi.c')
-rw-r--r--wbsio_spi.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/wbsio_spi.c b/wbsio_spi.c
index 6ab277a..e2cc4b1 100644
--- a/wbsio_spi.c
+++ b/wbsio_spi.c
@@ -186,7 +186,7 @@ int wbsio_spi_read(struct flashchip *flash, uint8_t *buf)
return 0;
}
-int wbsio_spi_write(struct flashchip *flash, uint8_t *buf)
+int wbsio_spi_write_1(struct flashchip *flash, uint8_t *buf)
{
int pos, size = flash->total_size * 1024;
int result;
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