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authorPeter Stuge <peter@stuge.se>2009-01-26 03:37:40 +0000
committerPeter Stuge <peter@stuge.se>2009-01-26 03:37:40 +0000
commitfd9217db8e90018a9e4d9f35d2c3cd4f09b32b84 (patch)
tree0104bf1bd4672feb0ac715f13b6f1372ed3467d7 /spi.c
parent5fecee462f6b070dded68cd775b8d1191cb71ee4 (diff)
downloadast2050-flashrom-fd9217db8e90018a9e4d9f35d2c3cd4f09b32b84.zip
ast2050-flashrom-fd9217db8e90018a9e4d9f35d2c3cd4f09b32b84.tar.gz
SST25VF040B using 0x90 identification and AAI write
SST AAI is Auto Address Increment writing, a streamed write to the flash chip where the first write command sets a starting address and following commands simply append data. Unfortunately not supported by Winbond SPI masters. From July 2008. Corresponding to flashrom svn r407 and coreboot v2 svn r3913. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se>
Diffstat (limited to 'spi.c')
-rw-r--r--spi.c26
1 files changed, 26 insertions, 0 deletions
diff --git a/spi.c b/spi.c
index 756fbe5..57f4b13 100644
--- a/spi.c
+++ b/spi.c
@@ -615,3 +615,29 @@ int spi_chip_write(struct flashchip *flash, uint8_t *buf)
return 1;
}
+
+int spi_aai_write(struct flashchip *flash, uint8_t *buf) {
+ uint32_t pos = 2, size = flash->total_size * 1024;
+ unsigned char w[6] = {0xad, 0, 0, 0, buf[0], buf[1]};
+ switch (flashbus) {
+ case BUS_TYPE_WBSIO_SPI:
+ fprintf(stderr, "%s: impossible with Winbond SPI masters, degrading to byte program\n", __func__);
+ return spi_chip_write(flash, buf);
+ default:
+ break;
+ }
+ flash->erase(flash);
+ spi_write_enable();
+ spi_command(6, 0, w, NULL);
+ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+ myusec_delay(5); /* SST25VF040B Tbp is max 10us */
+ while (pos < size) {
+ w[1] = buf[pos++];
+ w[2] = buf[pos++];
+ spi_command(3, 0, w, NULL);
+ while (spi_read_status_register() & JEDEC_RDSR_BIT_WIP)
+ myusec_delay(5); /* SST25VF040B Tbp is max 10us */
+ }
+ spi_write_disable();
+ return 0;
+}
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