Additionally to WREN also handle WRSR failures gracefully for ICHSPI

Until the ICH SPI driver can handle preopcodes as standalone opcodes,
we should handle such special opcode failure gracefully on ICH and
compatible chipsets.

This fixes status register writes on almost all ICH+VIA SPI masters.

The fix is almost identical to r484, but this time it affects the EWSR
(Enable Write Status Register) opcode instead of the WREN (Write Enable)
opcode.

With the differentiated return codes introduced in r500, the workaround
is more precise this time. The old WREN workaround was updated as well.

Corresponding to flashrom svn r514.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
Acked-by: Cristi Magherusan <cristi.magherusan@net.utcluj.ro>

1 files changed, 29 insertions, 4 deletions

diff --git a/spi.c b/spi.c
index 2f2842c..71cf004 100644
--- a/spi.c
+++ b/spi.c
@@ -121,8 +121,10 @@ int spi_write_enable(void)
 
 	/* Send WREN (Write Enable) */
 	result = spi_command(sizeof(cmd), 0, cmd, NULL);
-	if (result) {
-		printf_debug("spi_write_enable failed");
+
+	if (result)
+		printf_debug("%s failed", __func__);
+	if (result == SPI_INVALID_OPCODE) {
 		switch (flashbus) {
 		case BUS_TYPE_ICH7_SPI:
 		case BUS_TYPE_ICH9_SPI:
@@ -131,9 +133,12 @@ int spi_write_enable(void)
 				     " and hoping it will be run as PREOP\n");
 			return 0;
 		default:
-			printf_debug("\n");
+			break;
 		}
 	}
+	if (result)
+		printf_debug("\n");
+
 	return result;
 }
 
@@ -561,9 +566,29 @@ int spi_sector_erase(const struct flashchip *flash, unsigned long addr)
 int spi_write_status_enable(void)
 {
 	const unsigned char cmd[JEDEC_EWSR_OUTSIZE] = { JEDEC_EWSR };
+	int result;
 
 	/* Send EWSR (Enable Write Status Register). */
-	return spi_command(JEDEC_EWSR_OUTSIZE, JEDEC_EWSR_INSIZE, cmd, NULL);
+	result = spi_command(sizeof(cmd), JEDEC_EWSR_INSIZE, cmd, NULL);
+
+	if (result)
+		printf_debug("%s failed", __func__);
+	if (result == SPI_INVALID_OPCODE) {
+		switch (flashbus) {
+		case BUS_TYPE_ICH7_SPI:
+		case BUS_TYPE_ICH9_SPI:
+		case BUS_TYPE_VIA_SPI:
+			printf_debug(" due to SPI master limitation, ignoring"
+				     " and hoping it will be run as PREOP\n");
+			return 0;
+		default:
+			break;
+		}
+	}
+	if (result)
+		printf_debug("\n");
+
+	return result;
 }
 
 /*