path: root/programmer.h
diff options
authorCarl-Daniel Hailfinger <>2011-04-27 14:34:08 +0000
committerCarl-Daniel Hailfinger <>2011-04-27 14:34:08 +0000
commitbfecef6986b25b630605054680264daf09046f65 (patch)
treea54fe83e5bd047ca0ae0af1469973a76acddceb8 /programmer.h
parent880e867ae823dbbd140731f2eaa2ea656b4b9153 (diff)
Add support for more than one Super I/O or EC per machine
Flashrom currently only supports exactly one Super I/O or Embedded Controller, and this means quite a few notebooks and a small subset of desktop/server boards cannot be handled reliably and easily. Allow detection and initialization of up to 3 Super I/O and/or EC chips. WARNING! If a Super I/O or EC responds on multiple ports (0x2e and 0x4e), the code will do the wrong thing (namely, initialize the hardware twice). I have no idea if we should handle such situations, and whether we should ignore the second chip with identical ID or not. Initializing the hardware twice for the IT87* family is _not_ a problem, but I don't know how well IT85* can handle it (and whether IT85* would listen at more than one port anyway). Corresponding to flashrom svn r1289. Signed-off-by: Carl-Daniel Hailfinger <> Thanks to Thomas Schneider for testing on a board with ITE IT87* SPI. Test report (success) is here: Thanks to David Hendricks for testing on a Google Cr-48 laptop with ITE IT85* EC SPI. Test report (success) is here: Acked-by: David Hendricks <>
Diffstat (limited to 'programmer.h')
1 files changed, 5 insertions, 11 deletions
diff --git a/programmer.h b/programmer.h
index b7cebc3..7698ef0 100644
--- a/programmer.h
+++ b/programmer.h
@@ -52,11 +52,6 @@ enum programmer {
-#if defined(__i386__) || defined(__x86_64__)
#if CONFIG_FT2232_SPI == 1
@@ -273,7 +268,8 @@ struct superio {
uint16_t port;
uint16_t model;
-extern struct superio superio;
+extern struct superio superios[];
+extern int superio_count;
struct pci_dev *pci_dev_find_filter(struct pci_filter filter);
@@ -289,6 +285,7 @@ extern int is_laptop;
extern int force_boardenable;
extern int force_boardmismatch;
void probe_superio(void);
+int register_superio(struct superio s);
int internal_init(void);
int internal_shutdown(void);
void internal_chip_writeb(uint8_t val, chipaddr addr);
@@ -582,10 +579,8 @@ int ich_spi_send_multicommand(struct spi_command *cmds);
/* it85spi.c */
-struct superio probe_superio_ite85xx(void);
-int it85xx_spi_init(void);
+int it85xx_spi_init(struct superio s);
int it85xx_shutdown(void);
-int it85xx_probe_spi_flash(void);
int it85xx_spi_send_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr);
int it85_spi_read(struct flashchip *flash, uint8_t * buf, int start, int len);
@@ -594,9 +589,8 @@ int it85_spi_write_256(struct flashchip *flash, uint8_t * buf, int start, int le
/* it87spi.c */
void enter_conf_mode_ite(uint16_t port);
void exit_conf_mode_ite(uint16_t port);
-struct superio probe_superio_ite(void);
+void probe_superio_ite(void);
int init_superio_ite(void);
-int it87spi_init(void);
int it8716f_spi_send_command(unsigned int writecnt, unsigned int readcnt,
const unsigned char *writearr, unsigned char *readarr);
int it8716f_spi_chip_read(struct flashchip *flash, uint8_t *buf, int start, int len);
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