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author | Dima Veselov <kab00m@lich.phys.spbu.ru> | 2014-07-14 18:04:15 +0000 |
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committer | Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> | 2014-07-14 18:04:15 +0000 |
commit | 9d8f53d8704685af654d41d789692820f0278010 (patch) | |
tree | b689940270e5522eab748443f18195d048db7341 /print.c | |
parent | 1687854423c34aeeaece48bdd9a52a28d01584f0 (diff) | |
download | ast2050-flashrom-9d8f53d8704685af654d41d789692820f0278010.zip ast2050-flashrom-9d8f53d8704685af654d41d789692820f0278010.tar.gz |
Add Board Enable for ASUS Vintage 2 PH1 (P5LD2-MQ)
ASUS Vintage 2 PH1 barebone systems have a mainboard from the P5LD2 series,
namely the P5LD2-MQ (although it is labeled V2-PH1). Pin 16 GPIO needs to
be raised to enable write/erase like on other boards of the series.
NB: it uses a ICH7DH southbridge and hence requires different PCI IDs.
Corresponding to flashrom svn r1828.
Signed-off-by: Dima Veselov <kab00m@lich.phys.spbu.ru>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Diffstat (limited to 'print.c')
-rw-r--r-- | print.c | 1 |
1 files changed, 1 insertions, 0 deletions
@@ -749,6 +749,7 @@ const struct board_info boards_known[] = { B("ASUS", "P5L-MX", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LMX/", NULL), B("ASUS", "P5L-VM 1394", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LVM_1394/", NULL), B("ASUS", "P5LD2", NT, NULL, "Untested board enable."), + B("ASUS", "P5LD2-MQ", OK, "http://support.asus.com/download.aspx?SLanguage=en&p=8&s=12&m=Vintage-PH2&os=&hashedid=n/a", "Found in ASUS Vintage-PH2 barebones."), B("ASUS", "P5LD2-VM", NT, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LD2VM/", "Untested board enable."), B("ASUS", "P5LD2-VM DH", OK, "http://www.asus.com/Motherboards/Intel_Socket_775/P5LD2VM_DH/", NULL), B("ASUS", "P5LP-LE (Lithium-UL8E)", OK, "http://h10025.www1.hp.com/ewfrf/wc/document?docname=c00379616&tmp_task=prodinfoCategory&cc=us&dlc=en&lc=en&product=1159887", "This is an OEM board from HP."), |