path: root/flashrom.8
diff options
authorCarl-Daniel Hailfinger <>2010-07-21 10:26:01 +0000
committerCarl-Daniel Hailfinger <>2010-07-21 10:26:01 +0000
commite7fdd6e9a17129da53b8f4104b58899b5a011458 (patch)
tree0bd5bf090f36ef8f444d37e5bf4f2238345ac617 /flashrom.8
parent17e23ac9798e5e983232c42314d7affb2994925e (diff)
Add support for RayeR SPIPGM hardware as described in
To use the RayeR driver, run flashrom -p rayer_spi -V Known bugs/limitations: - Won't compile/work on non-x86 architectures. - Will always use direct port I/O access. Log follows: flashrom v0.9.2-r1039 on MS-DOS 7 (i686), built with libpci 3.1.5, GCC 4.3.2, little endian Calibrating delay loop... OK. Initializing rayer_bitbang_spi programmer Using port 0x378 as I/O base for parallel port access. ... Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2015 ... Found chip "Macronix MX25L1605" (2048 KB, SPI) at physical address 0xffe00000. ... No operations were specified. Corresponding to flashrom svn r1093. Signed-off-by: Carl-Daniel Hailfinger <> Acked-by: Martin Rehak <> Acked-by: Michael Karcher <>
Diffstat (limited to 'flashrom.8')
1 files changed, 10 insertions, 0 deletions
diff --git a/flashrom.8 b/flashrom.8
index 96aff5e..2ee22b5 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -187,6 +187,9 @@ USB SPI programmer)"
.BR "* buspirate_spi" " (for SPI flash ROMs attached to a Bus Pirate)"
+.BR "* rayer_spi" " (for SPI flash ROMs attached to a RayeR parport \
+based programmer)"
Some programmers have optional or mandatory parameters which are described
in detail in the
@@ -389,6 +392,10 @@ where
can be any of
.BR 30k ", " 125k ", " 250k ", " 1M ", " 2M ", " 2.6M ", " 4M ", " 8M
(in Hz). The default is the maximum frequency of 8 MHz.
+.BR "rayer_spi " programmer
+No parameters defined yet. More information about the hardware is available at
flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem
(/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails.
@@ -411,6 +418,9 @@ needs PCI configuration space access and raw I/O port access.
.BR gfxnvidia " and " drkaiser
need PCI configuration space access and raw memory access.
+.B rayer_spi
+needs raw I/O port access.
.B satasii
needs PCI configuration space read access and raw memory access.
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