path: root/flashrom.8
diff options
authorMark Marshall <>2010-12-03 14:48:11 +0000
committerCarl-Daniel Hailfinger <>2010-12-03 14:48:11 +0000
commit90021f28ff6cb97c53aeb18667addefb43c706e3 (patch)
tree7ec04388c7b9dbb9796953d6616b855bf451d341 /flashrom.8
parent859f3f0d751e92ec99c79408a4a7789bfb61a514 (diff)
Add support for the Open Graphics Project development card, OGD1, as a SPI flash programmer
The project is in the the process of designing and making a complete, open source, graphics card. More info at The first development card is a PCI add in card containing a couple of FPGAs and a couple of serial flash chips (amongst other things). The FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its own flash and does not need to be programmed by flashrom - it ensures that the device can enumerate on the PCI bus without needing further configuration. The larger FPGA is the S3. This is configured from a large SPI flash (2 MBytes). The second SPI flash is used to store the VGA BIOS. It is smaller (128 KBytes). This patch adds support for programming either of the two SPI flash chips. The programmer device takes one configuration option which selects which of the two flash chips is accessed. This must be set to either "cprom" or "bprom". (The project refers to the two chips as "cprom" / "bprom", "s3" and "bios" are more readable alternatives). Add support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested for write. Corresponding to flashrom svn r1241. Signed-off-by: Mark Marshall <> Acked-by: Carl-Daniel Hailfinger <>
Diffstat (limited to 'flashrom.8')
1 files changed, 36 insertions, 0 deletions
diff --git a/flashrom.8 b/flashrom.8
index 0f2a6c4..6adb0ef 100644
--- a/flashrom.8
+++ b/flashrom.8
@@ -198,6 +198,9 @@ based programmer)"
.BR "* nicintel_spi" " (for SPI flash ROMs attached to an Intel Gigabit \
network cards)"
+.BR "* ogp_spi" " (for SPI flash ROMs attached to an Open Graphics Project \
+graphics card)"
Some programmers have optional or mandatory parameters which are described
in detail in the
@@ -432,6 +435,34 @@ four. Make sure to not forget the "0x" prefix for hexadecimal port addresses.
More information about the hardware is available at
+.BR "ogp_spi " programmer
+The FLASH ROM chip to access must be specified with the
+.B rom
+.B " flashrom \-p ogp_spi:rom=name"
+.B name
+is either
+.B cprom
+.B s3
+for the configuration ROM and
+.B bprom
+.B bios
+for the BIOS ROM. If more than one card supported by the ogp_spi programmer
+is installed in your system, you have to specify the PCI address of the card
+you want to use with the
+.B pci=
+parameter as explained in the
+.B nic3com
+section above.
+More information about the hardware is available at
flashrom exits with 0 on success, 1 on most failures but with 2 if /dev/mem
(/dev/xsvc on Solaris) can not be opened and with 3 if a call to mmap() fails.
@@ -480,6 +511,9 @@ have to be run as superuser/root, and need additional raw access permission.
can be run as normal user on most operating systems if appropriate device
permissions are set.
+.B ogp
+needs PCI configuration space read access and raw memory access.
On OpenBSD, you can obtain raw access permission by setting
securelevel=-1 in /etc/rc.securelevel and rebooting, or rebooting into single
user mode.
@@ -538,6 +572,8 @@ Luc Verhaegen
Li-Ta Lo
+Mark Marshall
Markus Boas
Mattias Mattsson
OpenPOWER on IntegriCloud