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| author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-10-18 00:24:07 +0000 |
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| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2007-10-18 00:24:07 +0000 |
| commit | 6b44496c562b4c4be1ea32c7122904095210b33f (patch) | |
| tree | 56258d0ba9fba8ea65739f8493936b7ec5782beb /flashrom.8 | |
| parent | a502dcea3df45326898b99dc9f5f3744a776339d (diff) | |
| download | ast2050-flashrom-6b44496c562b4c4be1ea32c7122904095210b33f.zip ast2050-flashrom-6b44496c562b4c4be1ea32c7122904095210b33f.tar.gz | |
Add generic SPI flash erase and write support
The first chip the code was tested and verified with is the Macronix
MX25L4005, but other chips should work as well. Timeouts are still
hardcoded to data sheet maxima, but the status register checking code is
already there. Thanks to Harald Gutmann for the initial code on which
this is loosely based.
Corresponding to flashrom svn r152 and coreboot v2 svn r2874.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Diffstat (limited to 'flashrom.8')
0 files changed, 0 insertions, 0 deletions
