path: root/flashrom.8.tmpl
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authorAlexandre Boeglin <>2014-12-20 20:25:19 +0000
committerStefan Tauner <>2014-12-20 20:25:19 +0000
commit80e647158800d927c776d1278d8817f0ed8f17cd (patch)
treeb5b0f8f09acac5f114c80ac1ed2ff316c7c0eb12 /flashrom.8.tmpl
parent5859ced80f17217e7e829b61b02bb18b66b4f8e4 (diff)
Add support for the MSTAR I2C ISP protocol
Basically, among other chips, MSTAR manufactures SoCs that equip TV sets and computer screens, and it seems that all of their products use the same in-system programming protocol. Basically, they use the DDC channel of VGA or DVI connectors, which is actually an I2C bus, to encapsulate SPI frames (the flash chip is connected to the SoC through an SPI bus). I wrote this patch since the screen I bought had a software bug, and the manufacturer only released a new firmware binary, but no tool or instructions on flashing it. More details can be found here: I only read code from Linux kernel archives published by Acer to figure out the protocol (for a touchscreen controller and an NFC chip, both by MSTAR, that share the same ISP protocol), so I don't think there are any legal problems with it. Compilation is currently disabled by default in the Makefile. If in doubt, additional Makefile bugs were added by Stefan. Corresponding to flashrom svn r1860. Signed-off-by: Alexandre Boeglin <> Signed-off-by: Stefan Tauner <> Acked-by: Stefan Tauner <>
Diffstat (limited to 'flashrom.8.tmpl')
1 files changed, 47 insertions, 0 deletions
diff --git a/flashrom.8.tmpl b/flashrom.8.tmpl
index 81eceaa..5d08ea3 100644
--- a/flashrom.8.tmpl
+++ b/flashrom.8.tmpl
@@ -227,6 +227,8 @@ bitbanging adapter)
.BR "* nicintel_eeprom" " (for SPI EEPROMs on Intel Gigabit network cards)"
+.BR "* mstarddc_spi" " (for SPI flash ROMs accessible through DDC in MSTAR-equipped displays)"
Some programmers have optional or mandatory parameters which are described
in detail in the
@@ -889,6 +891,51 @@ Example that sets the frequency to 8 MHz:
.B " flashrom \-p linux_spi:dev=/dev/spidevX.Y,spispeed=8000"
Please note that the linux_spi driver only works on Linux.
+.BR "mstarddc_spi " programmer
+The Display Data Channel (DDC) is an I2C bus present on VGA and DVI connectors, that allows exchanging
+informations between a computer and attached displays. Its most common uses are getting display capabilities
+through EDID (at I2C address 0x50) and sending commands to the display using the DDC/CI protocol (at address
+0x37). On displays driven by MSTAR SoCs, it is also possible to access the SoC firmware flash (connected to
+the Soc through another SPI bus) using an In-System Programming (ISP) port, usually at address 0x49.
+This flashrom module allows the latter via Linux's I2C driver.
+Before using this programmer, the display
+be in standby mode, and only connected to the computer that will run flashrom using a VGA cable, to an
+inactive VGA output. It absolutely
+be used as a display during the procedure!
+You have to specify the DDC/I2C controller and I2C address to use with the
+.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-X:YY"
+syntax where
+.B /dev/i2c-X
+is the Linux device node for your I2C controller connected to the display's DDC channel, and
+.B YY
+is the (hexadecimal) address of the MSTAR ISP port (address 0x49 is usually used).
+Example that uses I2C controller /dev/i2c-1 and address 0x49:
+.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-1:49
+It is also possible to inhibit the reset command that is normally sent to the display once the flashrom
+operation is completed using the optional
+.B noreset
+parameter. A value of 1 prevents flashrom from sending the reset command.
+Example that does not reset the display at the end of the operation:
+.B " flashrom \-p mstarddc_spi:dev=/dev/i2c-1:49,noreset=1
+Please note that sending the reset command is also inhibited in the event an error occured during the operation.
+To send the reset command afterwards, you can simply run flashrom once more, in chip probe mode (not specifying
+an operation), without the
+.B noreset
+parameter, once the flash read/write operation you intended to perform has completed successfully.
+Please also note that the mstarddc_spi driver only works on Linux.
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