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| author | Mattias Mattsson <vitplister@gmail.com> | 2010-09-13 19:39:25 +0000 |
|---|---|---|
| committer | Mattias Mattsson <vitplister@gmail.com> | 2010-09-13 19:39:25 +0000 |
| commit | fb60cec40223da20a01accf4d352e66075307497 (patch) | |
| tree | 37e9776fc2eb71277b7edc39353fa336b20729b9 /flashchips.h | |
| parent | c8ca3de5ae0e2340f977182f035c4b8ec40a05fb (diff) | |
| download | ast2050-flashrom-fb60cec40223da20a01accf4d352e66075307497.zip ast2050-flashrom-fb60cec40223da20a01accf4d352e66075307497.tar.gz | |
Add board enable for ASUS P4SC-E
I does this by setting bits 3..2 of register 0x24 on the ITE IT8707F,
while keeping bit 3 of register 0x23 set while manipulating the first
register.
AFAIK, there is no public datasheet available for this super i/o chip, but
the above is how the vendor BIOS does it. Also, registers 0x23 and 0x24 seem
to have the same meaning as on the ITE IT8710F.
Matching on NB/SB.
Tested on a P4SC-E with SST 39SF020A flash. Probe, read, erase, write
all work.
lspci/superio output:
http://www.flashrom.org/pipermail/flashrom/2010-July/004090.html
flashrom output:
http://www.flashrom.org/pipermail/flashrom/2010-August/004566.html
Many thanks to Reinder de Haan for help with reverse engineering this!
Corresponding to flashrom svn r1161.
Signed-off-by: Mattias Mattsson <vitplister@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Diffstat (limited to 'flashchips.h')
0 files changed, 0 insertions, 0 deletions
