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authorUrja Rannikko <urjaman@gmail.com>2009-05-29 12:55:31 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-05-29 12:55:31 +0000
commitebd7b8393906876d4b450d8b83a9b748d43c64b4 (patch)
tree0abc62b03c9289947414c7eea3ee90b0aba65c33 /flashchips.c
parentd1129ac7015d9b3835591dff71da81bfa28dcd1d (diff)
downloadast2050-flashrom-ebd7b8393906876d4b450d8b83a9b748d43c64b4.zip
ast2050-flashrom-ebd7b8393906876d4b450d8b83a9b748d43c64b4.tar.gz
Add support for probe and read of Intel 28F001BX-T and BX-B
Erase & write support wont be this easy - the chips need 12V Vpp (needs a hardware hack or a supporting mb) and they have a very weird layout and are old. Corresponding to flashrom svn r555. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Diffstat (limited to 'flashchips.c')
-rw-r--r--flashchips.c28
1 files changed, 28 insertions, 0 deletions
diff --git a/flashchips.c b/flashchips.c
index ef5f563..857ffd5 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -754,6 +754,34 @@ struct flashchip flashchips[] = {
{
.vendor = "Intel",
+ .name = "28F001BX-B",
+ .manufacture_id = INTEL_ID,
+ .model_id = P28F001BXB,
+ .total_size = 128,
+ .page_size = 128 * 1024, /* 8k + 2x4k + 112k */
+ .tested = TEST_BAD_ERASE|TEST_BAD_WRITE,
+ .probe = probe_jedec,
+ .erase = NULL,
+ .write = NULL,
+ .read = read_memmapped,
+ },
+
+ {
+ .vendor = "Intel",
+ .name = "28F001BX-T",
+ .manufacture_id = INTEL_ID,
+ .model_id = P28F001BXT,
+ .total_size = 128,
+ .page_size = 128 * 1024, /* 112k + 2x4k + 8k */
+ .tested = TEST_OK_PR|TEST_BAD_ERASE|TEST_BAD_WRITE,
+ .probe = probe_jedec,
+ .erase = NULL,
+ .write = NULL,
+ .read = read_memmapped,
+ },
+
+ {
+ .vendor = "Intel",
.name = "82802AB",
.manufacture_id = INTEL_ID,
.model_id = 173,
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