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author | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-09-23 22:01:33 +0000 |
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committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2009-09-23 22:01:33 +0000 |
commit | a06287c9a04cfb055be958839ec18ce5e091c7fb (patch) | |
tree | 3fb7bd7382a884657b9eccce36d3f6f0a1583edf /flashchips.c | |
parent | c025268340dec1a53ba5e3117cc3245fa9c4a7ea (diff) | |
download | ast2050-flashrom-a06287c9a04cfb055be958839ec18ce5e091c7fb.zip ast2050-flashrom-a06287c9a04cfb055be958839ec18ce5e091c7fb.tar.gz |
Switch SST49LF004A/B to block erase, remove the hack which simulated (unsupported) chip erase
Annotate SST49LF004B quirks for TBL#.
Add TEST_OK_PRW which is useful when a PREW chip gets a new erase
routine.
Change a few erase function prototypes to use unsigned int instead of
int.
Corresponding to flashrom svn r731.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>
Diffstat (limited to 'flashchips.c')
-rw-r--r-- | flashchips.c | 18 |
1 files changed, 17 insertions, 1 deletions
diff --git a/flashchips.c b/flashchips.c index 83f6e96..1292d3e 100644 --- a/flashchips.c +++ b/flashchips.c @@ -2141,6 +2141,9 @@ struct flashchip flashchips[] = { }, { + /* Contrary to the data sheet, TBL# on the SST49LF004B affects the top 128kB (instead of 64kB) + * and is only honored for 64k block erase, but not 4k sector erase. + */ .vendor = "SST", .name = "SST49LF004A/B", .bustype = CHIP_BUSTYPE_FWH, /* A/A Mux */ @@ -2151,7 +2154,20 @@ struct flashchip flashchips[] = { .tested = TEST_OK_PREW, .probe = probe_sst_fwhub, .probe_timing = 1, /* 150 ns | routine is wrapper to probe_jedec (sst_fwhub.c) */ - .erase = erase_sst_fwhub, + .erase = NULL, + .block_erasers = + { + { + .eraseblocks = { {4 * 1024, 128} }, + .block_erase = erase_sector_jedec, /* missing unlock */ + }, { + .eraseblocks = { {64 * 1024, 8} }, + .block_erase = erase_sst_fwhub_block, /* same as erase_sector_block, but with unlock */ + }, { + .eraseblocks = { {512 * 1024, 1} }, + .block_erase = NULL, /* AA 55 80 AA 55 10, only in PP mode */ + }, + }, .write = write_sst_fwhub, .read = read_memmapped, }, |